DETECTION CIRCUIT FOR AN ACTIVE DISCHARGE CIRCUIT OF AN X-CAPACITOR, RELATED ACTIVE DISCHARGE CIRCUIT, INTEGRATED CIRCUIT AND METHOD
    2.
    发明申请
    DETECTION CIRCUIT FOR AN ACTIVE DISCHARGE CIRCUIT OF AN X-CAPACITOR, RELATED ACTIVE DISCHARGE CIRCUIT, INTEGRATED CIRCUIT AND METHOD 审中-公开
    用于X电容器的有源放电电路的检测电路,相关的主动放电电路,集成电路和方法

    公开(公告)号:US20160124029A1

    公开(公告)日:2016-05-05

    申请号:US14838125

    申请日:2015-08-27

    Abstract: An active discharge circuit discharges an X. The detection circuit includes a sensor circuit that generates a sensor signal indicative of an AC oscillation voltage at the X capacitor. The detection circuit also includes a processing unit that generates the reset signal as a function of a comparison signal. A comparator circuit generates the comparison signal by comparing the sensor signal with a threshold. A timer circuit sets a discharge enable signal to a first logic level when the timer circuit is reset via a reset signal. The timer circuit determines the time elapsed since the last reset and tests whether the time elapsed exceeds a given timeout value. If the time elapsed exceeds the given timeout value, the timer circuit sets the discharge enable signal to a second logic level. A dynamic threshold generator circuit varies the threshold of the comparator circuit as a function of the sensor signal.

    Abstract translation: 有源放电电路对X放电。检测电路包括传感器电路,其生成表示X电容器处的交流振荡电压的传感器信号。 检测电路还包括根据比较信号产生复位信号的处理单元。 比较器电路通过将传感器信号与阈值进行比较来生成比较信号。 当定时器电路通过复位信号复位时,定时器电路将放电使能信号设置为第一逻辑电平。 定时器电路确定自上次复位以来经过的时间,并测试经过的时间是否超过给定的超时值。 如果经过的时间超过给定的超时值,则定时器电路将放电使能信号设置为第二逻辑电平。 动态阈值发生器电路根据传感器信号改变比较器电路的阈值。

    Method for operating in burst mode active clamp flyback converters and corresponding active clamp flyback converter apparatus

    公开(公告)号:US12136883B2

    公开(公告)日:2024-11-05

    申请号:US17951703

    申请日:2022-09-23

    Abstract: An active flyback converter is transitioned between a plurality of operational states based on a comparison of a control voltage signal to voltage thresholds and a count of a number of consecutive switching cycles during which a clamp switch is kept off. The plurality of operational states includes a run state, an idle state, a first burst state, and a second burst state. Each set of consecutive switching cycles of the first burst state includes a determined number of switching cycles during which signals are generated to turn the power switch on and off and to maintain an off state of the clamp switch, and a switching cycle in a determined position in the set of switching cycles during which signals are sequentially generated to turn the power switch on, turn the power switch off, turn the clamp switch on and turn the clamp switch off.

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