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1.
公开(公告)号:US20200176442A1
公开(公告)日:2020-06-04
申请号:US16780769
申请日:2020-02-03
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mario Giuseppe SAGGIO , Simone RASCUNÁ
IPC: H01L27/06 , H01L29/872 , H01L29/06 , H01L29/10 , H01L29/16 , H01L29/66 , H01L29/78 , H01L21/04 , H01L29/08 , H01L29/423
Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.
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公开(公告)号:US20220020884A1
公开(公告)日:2022-01-20
申请号:US17370886
申请日:2021-07-08
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Simone RASCUNÁ
IPC: H01L29/872 , H01L29/66 , H01L21/265 , H01L29/16 , H01L29/861
Abstract: The vertical-conduction electronic power device is formed by a body of wide band gap semiconductor which has a first conductivity type and has a surface, and is formed by a drift region and by a plurality of surface portions delimited by the surface. The electronic device is further formed by a plurality of first implanted regions having a second conductivity type, which extend into the drift region from the surface, and by a plurality of metal portions, which are arranged on the surface. Each metal portion is in Schottky contact with a respective surface portion of the plurality of surface portions so as to form a plurality of Schottky diodes formed by first Schottky diodes and second Schottky diodes, wherein the first Schottky diodes have, at equilibrium, a Schottky barrier having a height different from that of the second Schottky diodes.
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公开(公告)号:US20190172715A1
公开(公告)日:2019-06-06
申请号:US16209680
申请日:2018-12-04
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Edoardo ZANETTI , Simone RASCUNÁ , Mario Giuseppe SAGGIO , Alfio GUARNERA , Leonardo FRAGAPANE , Cristina TRINGALI
IPC: H01L21/04 , H01L21/285 , H01L29/66 , H01L29/16 , H01L29/872
Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.
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4.
公开(公告)号:US20240186424A1
公开(公告)日:2024-06-06
申请号:US18443143
申请日:2024-02-15
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Simone RASCUNÁ
IPC: H01L29/872 , H01L21/265 , H01L29/16 , H01L29/66 , H01L29/861
CPC classification number: H01L29/872 , H01L21/26513 , H01L29/1608 , H01L29/66143 , H01L29/8611
Abstract: The vertical-conduction electronic power device is formed by a body of wide band gap semiconductor which has a first conductivity type and has a surface, and is formed by a drift region and by a plurality of surface portions delimited by the surface. The electronic device is further formed by a plurality of first implanted regions having a second conductivity type, which extend into the drift region from the surface, and by a plurality of metal portions, which are arranged on the surface. Each metal portion is in Schottky contact with a respective surface portion of the plurality of surface portions so as to form a plurality of Schottky diodes formed by first Schottky diodes and second Schottky diodes, wherein the first Schottky diodes have, at equilibrium, a Schottky barrier having a height different from that of the second Schottky diodes.
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公开(公告)号:US20220028978A1
公开(公告)日:2022-01-27
申请号:US17374871
申请日:2021-07-13
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Simone RASCUNÁ , Mario Giuseppe SAGGIO
IPC: H01L29/16 , H01L29/872 , H01L29/66
Abstract: Merged-PiN-Schottky, MPS, device comprising: a substrate of SiC with a first conductivity; a drift layer of SiC with the first conductivity, on the substrate; an implanted region with a second conductivity, extending at a top surface of the drift layer to form a junction-barrier, JB, diode with the substrate; and a first electrical terminal in ohmic contact with the implanted region and in direct contact with the top surface to form a Schottky diode with the drift layer. The JB diode and the Schottky diode are alternated to each other along an axis: the JB diode has a minimum width parallel to the axis with a first value, and the Schottky diode has a maximum width parallel to the axis with a second value smaller than, or equal to, the first value. A breakdown voltage of the MPS device is greater than, or equal to, 115% of a maximum working voltage of the MPS device in an inhibition state.
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6.
公开(公告)号:US20190013312A1
公开(公告)日:2019-01-10
申请号:US16027060
申请日:2018-07-03
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mario Giuseppe SAGGIO , Simone RASCUNÁ
IPC: H01L27/06 , H01L29/16 , H01L29/423 , H01L29/06 , H01L29/10 , H01L29/08 , H01L29/872 , H01L21/04
Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.
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7.
公开(公告)号:US20240243122A1
公开(公告)日:2024-07-18
申请号:US18416702
申请日:2024-01-18
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mario Giuseppe SAGGIO , Simone RASCUNÁ
IPC: H01L27/06 , H01L21/04 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/872
CPC classification number: H01L27/0629 , H01L21/046 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/1095 , H01L29/1608 , H01L29/4238 , H01L29/66068 , H01L29/7806 , H01L29/872
Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.
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8.
公开(公告)号:US20210328023A1
公开(公告)日:2021-10-21
申请号:US17226003
申请日:2021-04-08
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Simone RASCUNÁ , Paolo BADALÁ , Anna BASSI , Gabriele BELLOCCHI
IPC: H01L29/16 , H01L29/66 , H01L29/872
Abstract: A method for manufacturing a SiC-based electronic device, that includes implanting, at a front side of a solid body of SiC having a conductivity of N type, dopant species of P type, thus forming an implanted region that extends in depth in the solid body starting from the front side and has a top surface co-planar with said front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region at temperatures comprised between 1500° C. and 2600° C. so as to form an ohmic contact region including one or more carbon-rich layers, for example graphene and/or graphite layers, in the implanted region and, simultaneously, activation of the dopant species of P type.
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公开(公告)号:US20210328022A1
公开(公告)日:2021-10-21
申请号:US17225998
申请日:2021-04-08
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Simone RASCUNÁ , Mario Giuseppe SAGGIO , Giovanni FRANCO
IPC: H01L29/16 , H01L29/45 , H01L21/268
Abstract: A method for manufacturing a SiC-based electronic device, comprising the steps of: implanting, on a front side of a solid body made of SiC having a conductivity of an N type, dopant species of a P type thus forming an implanted region, which extends in the solid body starting from the front side and has a top surface coplanar with the front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region to temperatures comprised between 1500° C. and 2600° C. so as to form a carbon-rich electrical-contact region at the implanted region. The carbon-rich electrical-contact region forms an ohmic contact.
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公开(公告)号:US20250063785A1
公开(公告)日:2025-02-20
申请号:US18820135
申请日:2024-08-29
Applicant: STMicroelectronics S.r.l.
Inventor: Simone RASCUNÁ , Claudio CHIBBARO
IPC: H01L29/16 , H01L29/66 , H01L29/872
Abstract: An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.
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