公开(公告)号：US20220344467A1

公开(公告)日：2022-10-27

申请号：US17741310

申请日：2022-05-10

申请人： STMicroelectronics S.r.l.

发明人： Mario Giuseppe SAGGIO ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC分类号： H01L29/08 ,  H01L29/16

摘要： A MOSFET device includes a semiconductor body having a first and a second face. A source terminal of the MOSFET device includes a doped region which extends at the first face of the semiconductor body and a metal layer electrically coupled to the doped region. A drain terminal extends at the second face of the semiconductor body. The doped region includes a first sub-region having a first doping level and a first depth, and a second sub-region having a second doping level and a second depth. At least one among the second doping level and the second maximum depth has a value which is higher than a respective value of the first doping level and the first maximum depth. The metal layer is in electrical contact with the source terminal exclusively through the second sub-region.

公开(公告)号：US20230099610A1

公开(公告)日：2023-03-30

申请号：US18061795

申请日：2022-12-05

申请人： STMICROELECTRONICS S.r.l.

发明人： Edoardo ZANETTI ,  Simone RASCUNA' ,  Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Leonardo FRAGAPANE ,  Cristina TRINGALI

IPC分类号： H01L21/04 ,  H01L21/285 ,  H01L29/872 ,  H01L29/66 ,  H01L29/16 ,  H01L29/78 ,  H01L29/06

摘要： A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：US20230097579A1

公开(公告)日：2023-03-30

申请号：US17945530

申请日：2022-09-15

申请人： STMICROELECTRONICS S.r.l.

发明人： Mario Giuseppe SAGGIO ,  Alfio GUARNERA

IPC分类号： H01L29/78 ,  H01L29/16 ,  H01L29/06 ,  H01L21/04 ,  H01L21/761 ,  H01L29/66

摘要： A silicon carbide power device has: a die having a functional layer of silicon carbide and an edge area and an active area, surrounded by the edge area; gate structures formed on a top surface of the functional layer in the active area; and a gate contact pad for biasing the gate structures. The device also has an integrated resistor having a doped region, of a first conductivity type, arranged at the front surface of the functional layer in the edge area; wherein the integrated resistor defines an insulated resistance in the functional layer, interposed between the gate structures and the gate contact pad.

公开(公告)号：US20220246729A1

公开(公告)日：2022-08-04

申请号：US17565165

申请日：2021-12-29

申请人： STMicroelectronics S.r.l.

发明人： Mario Giuseppe SAGGIO ,  Edoardo ZANETTI ,  Alessia Maria FRAZZETTO ,  Alfio GUARNERA ,  Cateno Marco CAMALLERI ,  Antonio Giuseppe GRIMALDI

IPC分类号： H01L29/16 ,  H01L21/04 ,  H01L29/10 ,  H01L21/265

摘要： A vertical conduction MOSFET device includes a body of silicon carbide, which has a first type of conductivity and a face. A superficial body region of a second type of conductivity has a first doping level and extends into the body to a first depth , and has a first width. A source region of the first type of conductivity extends into the superficial body region to a second depth, and has a second width. The second depth is smaller than the first depth and the second width is smaller than the first width. A deep body region of the second type of conductivity has a second doping level and extends into the body, at a distance from the face of the body and in direct electrical contact with the superficial body region, and the second doping level is higher than the first doping level.

公开(公告)号：US20210151563A1

公开(公告)日：2021-05-20

申请号：US17096635

申请日：2020-11-12

申请人： STMicroelectronics S.r.l.

发明人： Mario Giuseppe SAGGIO ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC分类号： H01L29/08 ,  H01L29/16

摘要： A MOSFET device includes a semiconductor body having a first and a second face. A source terminal of the MOSFET device includes a doped region which extends at the first face of the semiconductor body and a metal layer electrically coupled to the doped region. A drain terminal extends at the second face of the semiconductor body. The doped region includes a first sub-region having a first doping level and a first depth, and a second sub-region having a second doping level and a second depth. At least one among the second doping level and the second maximum depth has a value which is higher than a respective value of the first doping level and the first maximum depth. The metal layer is in electrical contact with the source terminal exclusively through the second sub-region.

公开(公告)号：US20220262913A1

公开(公告)日：2022-08-18

申请号：US17669239

申请日：2022-02-10

申请人： STMICROELECTRONICS S.r.l.

发明人： Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Cateno Marco CAMALLERI

IPC分类号： H01L29/423 ,  H01L29/43 ,  H01L29/66 ,  H01L29/16 ,  H01L29/78 ,  H01L29/40

摘要： A vertical-conduction MOSFET device formed in a body of silicon carbide having a first and a second face and a peripheral zone. A drain region, of a first conductivity type, extends in the body between the two faces. A body region, of a second conductivity type, extends in the body from the first face, and a source region, having the first conductivity type, extends to the inside of the body region from the first face of the body. An insulated gate region extends on the first face of the body and comprises a gate conductive region. An annular connection region, of conductive material, is formed within a surface edge structure extending on the first face of the body, in the peripheral zone. The gate conductive region and the annular connection region are formed by a silicon layer and by a metal silicide layer overlying the silicon layer.

公开(公告)号：US20210399089A1

公开(公告)日：2021-12-23

申请号：US17346771

申请日：2021-06-14

申请人： STMicroelectronics S.r.l.

发明人： Mario Giuseppe SAGGIO ,  Angelo MAGRI' ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC分类号： H01L29/06 ,  H01L29/16

摘要： An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.

公开(公告)号：US20210249268A1

公开(公告)日：2021-08-12

申请号：US17244393

申请日：2021-04-29

申请人： STMICROELECTRONICS S.r.l.

发明人： Edoardo ZANETTI ,  Simone RASCUNA' ,  Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Leonardo FRAGAPANE ,  Cristina TRINGALI

IPC分类号： H01L21/04 ,  H01L21/285 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/16 ,  H01L29/872

摘要： A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：US20230134850A1

公开(公告)日：2023-05-04

申请号：US18045784

申请日：2022-10-11

申请人： STMICROELECTRONICS S.R.L.

发明人： Salvatore CASCINO ,  Alfio GUARNERA ,  Mario Giuseppe SAGGIO

IPC分类号： H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L21/04

摘要： A semiconductor power device has a maximum nominal voltage and includes: a first conduction terminal and a second conduction terminal; a semiconductor body, containing silicon carbide and having a first conductivity type; body wells having a second conductivity type, housed in the semiconductor body and separated from one another by a body distance; source regions housed in the body wells; and floating pockets having the second conductivity type, formed in the semiconductor body at a distance from the body wells between a first face and a second face of the semiconductor body. The floating pockets are shaped and arranged relative to the body wells so that a maximum intensity of electrical field around the floating pockets is greater than a maximum intensity of electrical field around the body wells at least for values of a conduction voltage between the first conduction terminal and the second conduction terminal greater than a threshold voltage, the threshold voltage being less than the maximum nominal voltage.

公开(公告)号：US20230092543A1

公开(公告)日：2023-03-23

申请号：US18052510

申请日：2022-11-03

申请人： STMICROELECTRONICS S.r.l.

发明人： Simone RASCUNA' ,  Claudio CHIBBARO ,  Alfio GUARNERA ,  Mario Giuseppe SAGGIO ,  Francesco LIZIO

IPC分类号： H01L23/31 ,  H01L21/04 ,  H01L21/56 ,  H01L29/16

摘要： An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.