公开(公告)号：US20190319453A1

公开(公告)日：2019-10-17

申请号：US15951806

申请日：2018-04-12

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics SA

Inventor： Radhakrishnan SITHANANDAM ,  Divya AGARWAL ,  Ghislain TROUSSIER ,  Jean JIMENEZ ,  Malathi KAR

IPC: H02H9/04 ,  H01L27/02

Abstract: Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit using an ESD event actuated MOSFET device. Triggering of the MOSFET device is made at both the gate terminal and the substrate (back gate) terminal. Additionally, the MOSFET device can be formed of cascoded MOSFETs.

公开(公告)号：US20190319454A1

公开(公告)日：2019-10-17

申请号：US15952466

申请日：2018-04-13

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics SA

Inventor： Radhakrishnan SITHANANDAM ,  Divya AGARWAL ,  Jean JIMENEZ ,  Malathi KAR

IPC: H02H9/04 ,  H01L27/02 ,  H01L27/07

Abstract: Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit using an ESD event actuated SCR device. The SCR device may include an embedded field effect transistor (FET) having an insulated gate that receives a trigger signal from an ESD detection circuit. The SCR device may alternatively include a variable substrate resistor having an insulated gate that receives a trigger signal from an ESD detection circuit.

公开(公告)号：US20130264677A1

公开(公告)日：2013-10-10

申请号：US13859418

申请日：2013-04-09

Applicant: STMICROELECTRONICS SA

Inventor： Philippe GALY ,  Jean JIMENEZ

IPC: H01L27/02 ,  H01L21/77

CPC classification number: H01L27/0207 ,  H01L21/76264 ,  H01L21/77 ,  H01L27/088 ,  H01L27/1211 ,  H01L29/0692 ,  H01L29/435 ,  H01L29/78 ,  H01L29/7824 ,  H01L29/7825

Abstract: At least three electrically conducting blocks are disposed within an isolating region; and at least two of them are mutually separated and capacitively coupled by a part of the isolating region. At least two of them, being semiconductor, have opposite types of conductivity or identical types of conductivity, but with different concentrations of dopants, and these are in mutual contact by one of their sides. The mutual arrangement of these blocks within the isolating region, their type of conductivity and their concentration of dopants form at least one electronic module. Some of the blocks define input and output blocks.

Abstract translation: 至少三个导电块设置在隔离区内; 并且它们中的至少两个被隔离区域的一部分相互分离和电容耦合。 它们中的至少两个是半导体，具有相反的导电性或相同类型的导电性，但是具有不同浓度的掺杂剂，并且这些掺杂物的两侧之间相互接触。 这些块在隔离区域内的相互排列，它们的导电类型及其掺杂剂的浓度形成至少一个电子模块。 一些块定义输入和输出块。