公开(公告)号：US20170162672A1

公开(公告)日：2017-06-08

申请号：US15372930

申请日：2016-12-08

Applicant: Commissariat a l'energie atomique et aux energies alternatives ,  STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Louis HUTIN ,  Julien BORREL ,  Yves MORAND ,  Fabrice NEMOUCHI

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66643 ,  H01L29/0895 ,  H01L29/66636 ,  H01L29/7839

Abstract: A process for manufacturing a Schottky barrier field-effect transistor is provided. The process includes: providing a structure including a control gate and a semiconductive layer positioned under the gate and having protrusions that protrude laterally with respect to the gate; anisotropically etching at least one of the protrusions by using the control gate as a mask, so as to form a recess in this protrusion, this recess defining a lateral face of the semiconductive layer; depositing a layer of insulator on the lateral face of the semiconductive layer; and depositing a metal in the recess on the layer of insulator so as to form a contact of metal/insulator/semiconductor type between the deposit of metal and the lateral face of the semiconductive layer.

公开(公告)号：US20190259838A1

公开(公告)日：2019-08-22

申请号：US16279361

申请日：2019-02-19

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Julien BORREL

IPC: H01L29/08 ,  H01L29/737 ,  H01L29/06 ,  H01L29/66 ,  H01L29/167

Abstract: A bipolar junction transistor includes an extrinsic collector region buried in a semiconductor substrate under an intrinsic collector region. Carbon-containing passivating regions are provided to delimit the intrinsic collector region. An insulating layer on the intrinsic collector region includes an opening within which an extrinsic base region is provided. A semiconductor layer overlies the insulating layer, is in contact with the extrinsic base region, and includes an opening with insulated sidewalls. The collector region of the transistor is provided between the insulated sidewalls.

公开(公告)号：US20230128033A1

公开(公告)日：2023-04-27

申请号：US17964350

申请日：2022-10-12

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Julien BORREL ,  Alexis GAUTHIER ,  Fanny HILARIO ,  Ludovic BERTHIER ,  Paul DUMAS ,  Edoardo BREZZA

IPC: H01L21/266 ,  H01L29/06

Abstract: According to one aspect provision is made of a method for ion implantation in a semiconductor wafer placed in an implantation chamber under vacuum, the semiconductor wafer having an integrated circuit area and a peripheral area around this integrated circuit area, the ion implantation allowing to apply a doping in regions, called implantation regions, of the integrated circuit area, the method comprising: forming a photosensitive resin coating serving as a mask on the semiconductor wafer, then forming openings in the photosensitive resin coating at said implantation regions of the integrated circuit area and at least at one region of the peripheral area, then implanting ions in the semiconductor wafer.

公开(公告)号：US20210273052A1

公开(公告)日：2021-09-02

申请号：US17323170

申请日：2021-05-18

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Julien BORREL

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/167 ,  H01L29/66 ,  H01L29/737 ,  H01L29/732

Abstract: A bipolar junction transistor includes an extrinsic collector region buried in a semiconductor substrate under an intrinsic collector region. Carbon-containing passivating regions are provided to delimit the intrinsic collector region. An insulating layer on the intrinsic collector region includes an opening within which an extrinsic base region is provided. A semiconductor layer overlies the insulating layer, is in contact with the extrinsic base region, and includes an opening with insulated sidewalls. The collector region of the transistor is provided between the insulated sidewalls.