公开(公告)号：US20170118424A1

公开(公告)日：2017-04-27

申请号：US15051545

申请日：2016-02-23

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Tarek Lule ,  Jérôme Chossat ,  Benoît Deschamps

IPC: H04N5/353 ,  H01L27/146 ,  H04N5/355

CPC classification number: H04N5/3535 ,  H01L27/14605 ,  H01L27/14607 ,  H01L27/14612 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14641 ,  H01L27/14645 ,  H04N5/35554 ,  H04N5/35572 ,  H04N5/35581 ,  H04N5/3696 ,  H04N5/37457 ,  H04N9/045

Abstract: The present disclosure relates to an image sensor including: a plurality of pixels, each including a first photodiode coupled to a first capacitive charge storage node by a first transistor, and a second photodiode coupled to a second capacitive charge storage node by a second transistor; and a control circuit configured so as to, during a phase of acquisition of a value representative of the illumination level of a pixel: acquire a first output value representative of the illumination level received by the first photodiode during a first uninterrupted integration period; and acquire a second output value representative of the illumination level received by the second photodiode during a second integration period divided into a plurality of separate sub-periods.

公开(公告)号：US10009558B2

公开(公告)日：2018-06-26

申请号：US15051545

申请日：2016-02-23

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Tarek Lule ,  Jérôme Chossat ,  Benoît Deschamps

IPC: H04N3/14 ,  H04N5/335 ,  H04N5/353 ,  H04N5/355 ,  H01L27/146

CPC classification number: H04N5/3535 ,  H01L27/14605 ,  H01L27/14607 ,  H01L27/14612 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14641 ,  H01L27/14645 ,  H04N5/35554 ,  H04N5/35572 ,  H04N5/35581 ,  H04N5/3696 ,  H04N5/37457 ,  H04N9/045

Abstract: The present disclosure relates to an image sensor including: a plurality of pixels, each including a first photodiode coupled to a first capacitive charge storage node by a first transistor, and a second photodiode coupled to a second capacitive charge storage node by a second transistor; and a control circuit configured so as to, during a phase of acquisition of a value representative of the illumination level of a pixel: acquire a first output value representative of the illumination level received by the first photodiode during a first uninterrupted integration period; and acquire a second output value representative of the illumination level received by the second photodiode during a second integration period divided into a plurality of separate sub-periods.