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    OPERATIONAL AMPLIFIER
    1.
    发明申请
    OPERATIONAL AMPLIFIER 有权

    公开(公告)号：US20220077831A1

    公开(公告)日：2022-03-10

    申请号：US17400789

    申请日：2021-08-12

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Philippe Pignolo ,  Pawel Fiedorow ,  Vincent Rabary

    IPC: H03F3/45

    Abstract: In an embodiment a differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.

    Analog multiplexer
    2.
    发明授权
    Analog multiplexer 有权
    模拟多路复用器

    公开(公告)号：US09520869B2

    公开(公告)日：2016-12-13

    申请号：US14837279

    申请日：2015-08-27

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Pawel Fiedorow ,  Thierry Masson

    IPC: H03K17/00 ,  H03K17/16 ,  H03K17/687 ,  H03K17/693 ,  H03K17/10 ,  H03K17/06

    CPC classification number: H03K17/162 ,  H03K17/005 ,  H03K17/102 ,  H03K17/6872 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0009 ,  H03K2217/0036 ,  H03K2217/0054

    Abstract: A switching circuit a multiplexer includes an NMOS switch module and a PMOS switch module connected in parallel between an input and an output. A first control module powered from a first power supply voltage operates to reduce leakage currents of the NMOS switching module when in the non-conducting state. A second control module powered from a second power supply voltage operates to reduce leakage currents of the PMOS switching module when in the non-conducting state. A voltage selection circuit is configured to deliver a voltage as the second power supply voltage equal to the greater of the first power supply voltage and the voltages present at the input and at the output.

    Abstract translation: 开关电路多路复用器包括在输入和输出之间并联连接的NMOS开关模块和PMOS开关模块。 由第一电源电压供电的第一控制模块用于在处于非导通状态时减小NMOS开关模块的漏电流。 由第二电源电压供电的第二控制模块用于在非导通状态下减小PMOS开关模块的漏电流。 电压选择电路被配置为当第二电源电压等于第一电源电压中的较大者和存在于输入端和输出端的电压时传送电压。

    ANALOG MULTIPLEXER
    4.
    发明申请
    ANALOG MULTIPLEXER 有权
    模拟多路复用器

    公开(公告)号：US20160173079A1

    公开(公告)日：2016-06-16

    申请号：US14837279

    申请日：2015-08-27

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Pawel Fiedorow ,  Thierry Masson

    IPC: H03K17/16 ,  H03K17/687 ,  H03K17/693

    CPC classification number: H03K17/162 ,  H03K17/005 ,  H03K17/102 ,  H03K17/6872 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0009 ,  H03K2217/0036 ,  H03K2217/0054

    Abstract: A switching circuit a multiplexer includes an NMOS switch module and a PMOS switch module connected in parallel between an input and an output. A first control module powered from a first power supply voltage operates to reduce leakage currents of the NMOS switching module when in the non-conducting state. A second control module powered from a second power supply voltage operates to reduce leakage currents of the PMOS switching module when in the non-conducting state. A voltage selection circuit is configured to deliver a voltage as the second power supply voltage equal to the greater of the first power supply voltage and the voltages present at the input and at the output.

    Abstract translation: 开关电路多路复用器包括在输入和输出之间并联连接的NMOS开关模块和PMOS开关模块。 由第一电源电压供电的第一控制模块用于在处于非导通状态时减小NMOS开关模块的漏电流。 由第二电源电压供电的第二控制模块用于在非导通状态下减小PMOS开关模块的漏电流。 电压选择电路被配置为当第二电源电压等于第一电源电压中的较大者和存在于输入端和输出端的电压时传送电压。

    Operational amplifier
    5.
    发明授权
    Operational amplifier 有权

    公开(公告)号：US11632091B2

    公开(公告)日：2023-04-18

    申请号：US17400789

    申请日：2021-08-12

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Philippe Pignolo ,  Pawel Fiedorow ,  Vincent Rabary

    IPC: H03F3/45

    Abstract: A differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.

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