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    Low-voltage Differential signal receiver circuitry
    2.
    发明申请
    Low-voltage Differential signal receiver circuitry 有权
    低压差分信号接收电路

    公开(公告)号：US20150077166A1

    公开(公告)日：2015-03-19

    申请号：US14479795

    申请日：2014-09-08

    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

    Inventor： Thierry Masson ,  Sandrine Nicolas ,  Colette Morche

    IPC: H02M3/06 ,  G05F5/00

    CPC classification number: H02M3/06 ,  G05F5/00 ,  H03F3/45959 ,  H04L25/0292

    Abstract: A receiver circuit for a differential input signal, may include a divider bridge having first and second ends, a midpoint therebetween, and intermediate points on either side of the midpoint. The divider bridge is coupled to receive the differential input signal at the first and second ends. A current generator is coupled to the divider bridge and configured to generate compensation currents associated respectively with components of the differential input signal. The divider bridge is configured to receive the compensation currents respectively at the intermediate points, and generate a compensated differential signal between the intermediate points.

    Abstract translation: 用于差分输入信号的接收器电路可以包括具有第一端和第二端，其中间点和中点两侧的中间点的分隔桥。 分压器桥耦合以在第一端和第二端接收差分输入信号。 电流发生器耦合到分压器桥并且被配置为产生分别与差分输入信号的分量相关联的补偿电流。 分压器桥被配置为分别在中间点处接收补偿电流，并在中间点之间产生经补偿的差分信号。

    Low-voltage differential signal receiver circuitry
    5.
    发明授权
    Low-voltage differential signal receiver circuitry 有权
    低压差分信号接收电路

    公开(公告)号：US09013221B2

    公开(公告)日：2015-04-21

    申请号：US14479795

    申请日：2014-09-08

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Thierry Masson ,  Sandrine Nicolas ,  Colette Morche

    IPC: H03L5/00 ,  H02M3/06 ,  G05F5/00

    CPC classification number: H02M3/06 ,  G05F5/00 ,  H03F3/45959 ,  H04L25/0292

    Abstract: A receiver circuit for a differential input signal, may include a divider bridge having first and second ends, a midpoint therebetween, and intermediate points on either side of the midpoint. The divider bridge is coupled to receive the differential input signal at the first and second ends. A current generator is coupled to the divider bridge and configured to generate compensation currents associated respectively with components of the differential input signal. The divider bridge is configured to receive the compensation currents respectively at the intermediate points, and generate a compensated differential signal between the intermediate points.

    Abstract translation: 用于差分输入信号的接收器电路可以包括具有第一端和第二端，其中间点和中点两侧的中间点的分隔桥。 分压器桥耦合以在第一端和第二端接收差分输入信号。 电流发生器耦合到分压器桥并且被配置为产生分别与差分输入信号的分量相关联的补偿电流。 分压器桥被配置为分别在中间点处接收补偿电流，并在中间点之间产生经补偿的差分信号。

    SWITCH AND SAMPLING CIRCUIT
    6.
    发明公开
    SWITCH AND SAMPLING CIRCUIT 审中-公开

    公开(公告)号：US20230327666A1

    公开(公告)日：2023-10-12

    申请号：US18191491

    申请日：2023-03-28

    Applicant: STMicroelectronics (Grenoble) 2) SAS ,  STMicroelectronics (Alps) SAS

    Inventor： Matthieu Desvergne ,  Marc Sabut ,  Emmanuel Allier ,  Thierry Masson

    IPC: H03K17/687 ,  H03K17/22 ,  H03K17/10

    CPC classification number: H03K17/6871 ,  H03K17/223 ,  H03K17/102

    Abstract: In an embodiment a switch includes a first MOS transistor having its source connected to its channel-forming region and coupled with a first terminal of the switch, its drain coupled with a second terminal of the switch, and its gate connected to a first node of the switch, a diode coupling the first terminal with the first node, a capacitive element coupling a third terminal of the switch with the first node, the third terminal being configured to receive a control signal for the switch and a discharge circuit coupling the first node with the first terminal, the discharge circuit configured to conduct only when a voltage between the first node and the first terminal is greater than or equal to a threshold.

    ANALOG MULTIPLEXER
    8.
    发明申请
    ANALOG MULTIPLEXER 有权
    模拟多路复用器

    公开(公告)号：US20160173079A1

    公开(公告)日：2016-06-16

    申请号：US14837279

    申请日：2015-08-27

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Pawel Fiedorow ,  Thierry Masson

    IPC: H03K17/16 ,  H03K17/687 ,  H03K17/693

    CPC classification number: H03K17/162 ,  H03K17/005 ,  H03K17/102 ,  H03K17/6872 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0009 ,  H03K2217/0036 ,  H03K2217/0054

    Abstract: A switching circuit a multiplexer includes an NMOS switch module and a PMOS switch module connected in parallel between an input and an output. A first control module powered from a first power supply voltage operates to reduce leakage currents of the NMOS switching module when in the non-conducting state. A second control module powered from a second power supply voltage operates to reduce leakage currents of the PMOS switching module when in the non-conducting state. A voltage selection circuit is configured to deliver a voltage as the second power supply voltage equal to the greater of the first power supply voltage and the voltages present at the input and at the output.

    Abstract translation: 开关电路多路复用器包括在输入和输出之间并联连接的NMOS开关模块和PMOS开关模块。 由第一电源电压供电的第一控制模块用于在处于非导通状态时减小NMOS开关模块的漏电流。 由第二电源电压供电的第二控制模块用于在非导通状态下减小PMOS开关模块的漏电流。 电压选择电路被配置为当第二电源电压等于第一电源电压中的较大者和存在于输入端和输出端的电压时传送电压。

    Device for correcting the voltage offset of a wheatstone bridge
    9.
    发明授权
    Device for correcting the voltage offset of a wheatstone bridge 有权

    公开(公告)号：US10024886B2

    公开(公告)日：2018-07-17

    申请号：US14837556

    申请日：2015-08-27

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Thierry Masson ,  Serge Pontarollo

    IPC: G01R17/06 ,  G01D3/036 ,  G01R17/10

    Abstract: A circuit includes a Wheatstone bridge and a correction circuit operable to correct an output voltage offset of the Wheatstone bridge. The correction circuit includes a supply module configured to supply the Wheatstone bridge with a voltage and output a first current applied to the Wheatstone bridge and output a second current proportional to the first current. A digital/analog current converter outputs a correction current to the outputs of the Wheatstone bridge circuit in response to a digital correction signal and the second current.

    Analog multiplexer
    10.
    发明授权
    Analog multiplexer 有权
    模拟多路复用器

    公开(公告)号：US09520869B2

    公开(公告)日：2016-12-13

    申请号：US14837279

    申请日：2015-08-27

    Applicant: STMicroelectronics (Grenoble 2) SAS

    Inventor： Pawel Fiedorow ,  Thierry Masson

    IPC: H03K17/00 ,  H03K17/16 ,  H03K17/687 ,  H03K17/693 ,  H03K17/10 ,  H03K17/06

    CPC classification number: H03K17/162 ,  H03K17/005 ,  H03K17/102 ,  H03K17/6872 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0009 ,  H03K2217/0036 ,  H03K2217/0054

    Abstract: A switching circuit a multiplexer includes an NMOS switch module and a PMOS switch module connected in parallel between an input and an output. A first control module powered from a first power supply voltage operates to reduce leakage currents of the NMOS switching module when in the non-conducting state. A second control module powered from a second power supply voltage operates to reduce leakage currents of the PMOS switching module when in the non-conducting state. A voltage selection circuit is configured to deliver a voltage as the second power supply voltage equal to the greater of the first power supply voltage and the voltages present at the input and at the output.

    Abstract translation: 开关电路多路复用器包括在输入和输出之间并联连接的NMOS开关模块和PMOS开关模块。 由第一电源电压供电的第一控制模块用于在处于非导通状态时减小NMOS开关模块的漏电流。 由第二电源电压供电的第二控制模块用于在非导通状态下减小PMOS开关模块的漏电流。 电压选择电路被配置为当第二电源电压等于第一电源电压中的较大者和存在于输入端和输出端的电压时传送电压。

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