公开(公告)号：US10659020B2

公开(公告)日：2020-05-19

申请号：US16271077

申请日：2019-02-08

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jean Nicolai ,  Albert Martinez

IPC: H03K21/00 ,  H03K3/84 ,  H03K21/02 ,  H03K23/00 ,  H03K5/06 ,  H03K19/003

Abstract: A circuit includes a random oscillation number generator (RONG) configured to generate first and second pulse signals at first and second RONG outputs. A first counter is coupled to the first RONG output and generates a first count at a first counter output. A second counter is coupled to the second RONG output and generates a second count at a second counter output. A selection circuit is coupled to the first and second counter outputs and to the first and second RONG outputs. A first pulse shaper is connected between the first RONG output and the first counter, and a second pulse shaper is connected between the second RONG output and the second counter.

公开(公告)号：US10243543B2

公开(公告)日：2019-03-26

申请号：US15358245

申请日：2016-11-22

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jean Nicolai ,  Albert Martinez

IPC: H03K21/00 ,  H03K3/84 ,  H03K21/02 ,  H03K23/00 ,  H03K5/06 ,  H03K19/003

Abstract: A pulse counting circuit receives pulses supplied by a source circuit having at least two inverted pulse signal supply terminals. The circuit includes a first counter to count pulses of a first pulse signal and supply a first count and a second counter to count pulses of a second pulse signal and supply a second count. A selection circuit selects one of the first and second counts.

公开(公告)号：US20170324403A1

公开(公告)日：2017-11-09

申请号：US15358245

申请日：2016-11-22

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jean Nicolai ,  Albert Martinez

IPC: H03K3/84 ,  H03K5/06 ,  H03K19/003 ,  H03K21/02

CPC classification number: H03K3/84 ,  H03K5/06 ,  H03K19/00323 ,  H03K21/023 ,  H03K23/004

Abstract: A pulse counting circuit receives pulses supplied by a source circuit having at least two inverted pulse signal supply terminals. The circuit includes a first counter to count pulses of a first pulse signal and supply a first count and a second counter to count pulses of a second pulse signal and supply a second count. A selection circuit selects one of the first and second counts.

公开(公告)号：US10075166B2

公开(公告)日：2018-09-11

申请号：US15361708

申请日：2016-11-28

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Albert Martinez ,  Michel Agoyan ,  Jean Nicolai

IPC: H03K19/003 ,  H03K5/14 ,  H03K19/20 ,  H03L3/00

CPC classification number: H03K19/003 ,  H03K3/84 ,  H03K5/14 ,  H03K19/20 ,  H03L3/00

Abstract: A circuit generates a number of oscillations. The circuit includes a first branch with at least one delay line introducing symmetrical delays on rising edges and on falling edges and at least one asymmetrical delay element introducing different delays on rising edges and on falling edges. The circuit further includes a second branch looped back on the first branch and including at least one delay line introducing symmetrical delays on rising edges and on falling edges.

公开(公告)号：US20170324409A1

公开(公告)日：2017-11-09

申请号：US15361708

申请日：2016-11-28

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Albert Martinez ,  Michel Agoyan ,  Jean Nicolai

IPC: H03K19/003 ,  H03K5/14 ,  H03K19/20 ,  H03L3/00

CPC classification number: H03K19/003 ,  H03K3/84 ,  H03K5/14 ,  H03K19/20 ,  H03L3/00

Abstract: A circuit generates a number of oscillations. The circuit includes a first branch with at least one delay line introducing symmetrical delays on rising edges and on falling edges and at least one asymmetrical delay element introducing different delays on rising edges and on falling edges. The circuit further includes a second branch looped back on the first branch and including at least one delay line introducing symmetrical delays on rising edges and on falling edges.