Abstract:
An electronic device disclosed herein includes a current comparator to generate an output current based upon a difference between a current flowing in an output branch and a current flowing in an input branch. A pair of transistors is coupled to an output of the current comparator. A first amplifier has inputs coupled to the pair of transistors and to a reference voltage, the first amplifier being configured to subtract the reference voltage from a voltage across the pair of transistors and output a difference voltage. A second amplifier has inputs coupled to the difference voltage and to the reference voltage, the second amplifier being configured to subtract the difference voltage from the reference voltage and output a pulse skipping mode reference signal.
Abstract:
Current flowing through an inductor in response to a pulse width modulation (PWM) control signal is sensed to generate a sensed current. The sensed current is processed over one or more PWM cycles of the PWM control signal to generate an output signal indicative of average inductor current. This processing may include charging and discharging a capacitor at different rates dependent on the sense current, with the detection of capacitor discharge triggering a sampling of a voltage dependent on the sensed current that is indicative of average inductor current. The processing may include using the sensed to current to generate a first charge voltage associated with minimum inductor current and a second charge voltage associated with maximum inductor current, and then averaging the first and second charge voltages to generate an output signal indicative of average inductor current.
Abstract:
A charge pump circuit is coupled between a positive supply node and a ground node. The charge pump circuit operates in response to clock signals output from a clock generator to produce a negative voltage at a negative voltage output node. A soft-start circuit for the charge pump circuit includes a comparison circuit configured to compare a varying intermediate voltage sensed between a rising supply voltage and the negative voltage to a ramp voltage during a start-up period of the charge pump circuit. The clock generator is selectively enabled to generate the clock signals in response to the comparison to provide for pulse-skipping.
Abstract:
An electronic device disclosed herein includes a current comparator to generate an output current based upon a difference between a current flowing in an output branch and a current flowing in an input branch. A pair of transistors is coupled to an output of the current comparator. A first amplifier has inputs coupled to the pair of transistors and to a reference voltage, the first amplifier being configured to subtract the reference voltage from a voltage across the pair of transistors and output a difference voltage. A second amplifier has inputs coupled to the difference voltage and to the reference voltage, the second amplifier being configured to subtract the difference voltage from the reference voltage and output a pulse skipping mode reference signal.
Abstract:
An electronic device may include a switching converter configured to convert an input voltage to an output voltage, and being selectively operable in a pulse skipping mode based upon a control signal. The switching converter may include a comparator having a first input configured to receive an error signal, a second input configured to receive a skipping mode reference signal, and an output configured to generate the control signal. A reference generator may be configured to generate the skipping mode reference signal as a function of a difference between the output voltage and the input voltage.
Abstract:
A current source circuit is configured to receive a reference current at the input circuit path of a current mirror circuit. The current mirror circuit mirrors the reference current and generates mirror currents at a number of output circuit paths. A corresponding number of control transistors are connected in series with the output circuit paths. Each control transistor is selectively actuated in response to a control signal. A decoder circuit is configured to receive a variable control signal and generate actuation signals in response thereto to selective actuate the control transistors to pass the mirror current to an output node. At the output node, the passed mirror currents are summed to generate a variable output current. The variable current is monotonically modulated in response to the variable control signal.
Abstract:
A driving circuit includes a controller, a converter and a feedback module. The controller receives an input supply at a supply node, and generates a control signal according to the input supply. The converter receive an input signal at an input node and a control signal at a control node, and is configured to convert the input signal to a driving signal in response to the control signal. The driving signal of the converter is feedback by the feedback module to the controller. The input supply is generated from the input signal or the feedback driving signal. The drive circuit may drive a display device.
Abstract:
A low side driver includes a first transistor coupled in series with a second transistor at a low side voltage node for a load. A capacitance is configured to store a voltage and a voltage buffer circuit has an input coupled to receive the voltage stored by the capacitance and an output coupled to drive a control node of the second transistor with the stored voltage. A current source supplies current through a switch to the capacitance and the input of the voltage buffer circuit. The switch is configured to be actuated by an oscillating enable signal so as to cyclically source current from the current source to the capacitance and cause a stepped increase in the stored voltage which is applied by the buffer circuit to the control node of the second transistor.
Abstract:
A low side driver includes a first transistor coupled in series with a second transistor at a low side voltage node for a load. A capacitance is configured to store a voltage and a voltage buffer circuit has an input coupled to receive the voltage stored by the capacitance and an output coupled to drive a control node of the second transistor with the stored voltage. A current source supplies current through a switch to the capacitance and the input of the voltage buffer circuit. The switch is configured to be actuated by an oscillating enable signal so as to cyclically source current from the current source to the capacitance and cause a stepped increase in the stored voltage which is applied by the buffer circuit to the control node of the second transistor.
Abstract:
Current flowing through an inductor in response to a pulse width modulation (PWM) control signal is sensed to generate a sensed current. The sensed current is processed over one or more PWM cycles of the PWM control signal to generate an output signal indicative of average inductor current. This processing may include charging and discharging a capacitor at different rates dependent on the sense current, with the detection of capacitor discharge triggering a sampling of a voltage dependent on the sensed current that is indicative of average inductor current. The processing may include using the sensed to current to generate a first charge voltage associated with minimum inductor current and a second charge voltage associated with maximum inductor current, and then averaging the first and second charge voltages to generate an output signal indicative of average inductor current.