公开(公告)号：US20190173458A1

公开(公告)日：2019-06-06

申请号：US16273317

申请日：2019-02-12

Applicant: STMicroelectronics Asia Pacific Pte Ltd

Inventor： Beng-Heng GOH ,  Yi Ren CHIN

IPC: H03K5/151 ,  G11C7/22 ,  G11C19/28 ,  H03L7/00

CPC classification number: H03K5/1515 ,  G11C7/22 ,  G11C7/222 ,  G11C19/28 ,  G11C19/287 ,  H03L7/00

Abstract: An electronic device includes clock generation circuitry. The clock generation circuitry includes a first flip flop receiving as input a device clock and being triggered by an input clock and a second flip flop receiving, as input, output from the first flip flop and being triggered by the input clock. A first inverter receives output from the first flip flop as input and a second inverter receives output from the second flip flop as input. A first AND gate receives, as input, output from the second flip flop and the first inverter, and generates a first clock as output. A second AND gate receives, as input, output from the first flip flop and the second inverter, and generates a second clock as output.