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公开(公告)号:US11835991B2
公开(公告)日:2023-12-05
申请号:US17208935
申请日:2021-03-22
Applicant: STMicroelectronics International N.V.
IPC: G06F11/27 , G01R31/3177 , G06F1/08
CPC classification number: G06F11/27 , G01R31/3177 , G06F1/08
Abstract: In an embodiment, a method for managing self-tests in an integrated circuit (IC) includes: receiving built-in-self-test (BIST) configuration data; configuring a first clock to a first frequency based on the BIST configuration data; performing a first BIST test at the first frequency; configuring a second clock to a second frequency that is different from the first frequency; and performing a second BIST test at the second frequency.
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公开(公告)号:US20230214292A1
公开(公告)日:2023-07-06
申请号:US17567540
申请日:2022-01-03
Applicant: STMicroelectronics International N.V.
Inventor: Amulya Pandey , Manish Bansal , Sandeep Bhattacharya
CPC classification number: G06F11/1068 , G06F11/0772 , G06F11/27 , G06F9/30145 , G06F9/30101 , G06F9/4812
Abstract: In an embodiment, an electronic circuit includes: a plurality of signal channels; a signal collection circuit configured to determine an action of the electronic circuit based on channel signals from the plurality of signal channels; and a first signal management circuit coupled between the plurality of signal channels and the signal collection circuit, the first signal management circuit including: a set of internal registers, a set of user registers, and a decoder configured to program the set of internal registers based on a content of the set of user registers, where the first signal management circuit is configured to receive the channel signals via the plurality of signal channels, generate first aggregated signals based on the received channel signals and a content of the set of internal registers, and transmitting the first aggregated signals to the signal collection circuit.
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公开(公告)号:US11698833B1
公开(公告)日:2023-07-11
申请号:US17567540
申请日:2022-01-03
Applicant: STMicroelectronics International N.V.
Inventor: Amulya Pandey , Manish Bansal , Sandeep Bhattacharya
CPC classification number: G06F11/1068 , G06F9/30101 , G06F9/30145 , G06F9/4812 , G06F11/0772 , G06F11/27
Abstract: In an embodiment, an electronic circuit includes: a plurality of signal channels; a signal collection circuit configured to determine an action of the electronic circuit based on channel signals from the plurality of signal channels; and a first signal management circuit coupled between the plurality of signal channels and the signal collection circuit, the first signal management circuit including: a set of internal registers, a set of user registers, and a decoder configured to program the set of internal registers based on a content of the set of user registers, where the first signal management circuit is configured to receive the channel signals via the plurality of signal channels, generate first aggregated signals based on the received channel signals and a content of the set of internal registers, and transmitting the first aggregated signals to the signal collection circuit.
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公开(公告)号:US20220300389A1
公开(公告)日:2022-09-22
申请号:US17208935
申请日:2021-03-22
Applicant: STMicroelectronics International N.V.
IPC: G06F11/27 , G01R31/3177 , G06F1/08
Abstract: In an embodiment, a method for managing self-tests in an integrated circuit (IC) includes: receiving built-in-self-test (BIST) configuration data; configuring a first clock to a first frequency based on the BIST configuration data; performing a first BIST test at the first frequency; configuring a second clock to a second frequency that is different from the first frequency; and performing a second BIST test at the second frequency.
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