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公开(公告)号：US20240372383A1
公开(公告)日：2024-11-07
申请号：US18634476
申请日：2024-04-12
Applicant: STMicroelectronics International N.V.
Inventor： Alexandre Tramoni , Christophe Grundrich , Kosta Kovacic
Abstract: According to one aspect, a charging transmitter device is configured to carry out near-field wireless charging of a power receiver device, the charging transmitter device comprising a charging safeguarding circuit including a detection circuit configured to detect a movement of the power receiver device relative to the charging transmitter device, and a charging control circuit configured to stop charging when a movement of the power receiver device is detected.
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公开(公告)号：US10128913B2
公开(公告)日：2018-11-13
申请号：US15669380
申请日：2017-08-04
Applicant: STMicroelectronics International N.V.
Inventor： Vinko Kunc , Maksimiljan Stiglic , Kosta Kovacic , Albin Pevec , Anton Stern
Abstract: A circuit of an actively transmitting tag includes an antenna, a digitizer, a voltage-controlled oscillator (VCO), an output amplifier, a phase-displacement detector, and a regulator. The input of the digitizer connects to the antenna. The outputs of the digitizer and the output amplifier are connected to the input terminals of the phase-displacement detector. The output amplifier connects the output of the VCO to the antenna and the regulator connects the output of the phase-displacement detector to the VCO.
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公开(公告)号：US10049237B2
公开(公告)日：2018-08-14
申请号：US15473074
申请日：2017-03-29
Applicant: STMicroelectronics International N.V
Inventor： Kosta Kovacic , Albin Pevec , Maksimiljan Stiglic
Abstract: Embodiments provide a method for sending a message from an RFID transponder to a reader during a transmission frame using active load modulation, the method comprising. An encoded bit signal has a first logic level during first time segments within the transmission frame and a second logic level during second time segments within the transmission frame. The first time segments include an initial time segment of the transmission frame. A transmission signal is generated based on the encoded bit signal. The transmission signal is generated having a first phase depending on the first logic level during the first time segments, a second phase depending on the second logic level during the second time segments, and the second phase during a time interval preceding the transmission frame.
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公开(公告)号：US10198680B2
公开(公告)日：2019-02-05
申请号：US15913003
申请日：2018-03-06
Applicant: STMicroelectronics International N.V.
Inventor： Vinko Kunc , Maksimiljan Stiglic , Kosta Kovacic
Abstract: A circuit includes an antenna circuit including a number of capacitors and an inductor. The antenna circuit is configured to transmit an output signal upon receiving an input transmit signal. A first control block is configured to transmit an enabling signal upon detecting a presence of a supply voltage at a feeding terminal of the actively transmitting tag in response to the actively transmitting tag being inserted into a host device. A VCO is configured to generate the input transmit signal with the frequency of the interrogator carrier signal upon receiving the enabling signal from the first control block and upon receiving the control voltage from the memory. A second control block is configured to enable a subset of the plurality of capacitors of the antenna circuit upon receiving the enabling signal from the first control block.
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公开(公告)号：US20180197059A1
公开(公告)日：2018-07-12
申请号：US15913003
申请日：2018-03-06
Applicant: STMicroelectronics International N.V
Inventor： Vinko Kunc , Maksimiljan Stiglic , Kosta Kovacic
CPC classification number: G06K19/0726 , H01Q1/2208
Abstract: A circuit includes an antenna circuit including a number of capacitors and an inductor. The antenna circuit is configured to transmit an output signal upon receiving an input transmit signal. A first control block is configured to transmit an enabling signal upon detecting a presence of a supply voltage at a feeding terminal of the actively transmitting tag in response to the actively transmitting tag being inserted into a host device. A VCO is configured to generate the input transmit signal with the frequency of the interrogator carrier signal upon receiving the enabling signal from the first control block and upon receiving the control voltage from the memory. A second control block is configured to enable a subset of the plurality of capacitors of the antenna circuit upon receiving the enabling signal from the first control block.
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Patent Agency Ranking
公开(公告)号：US20170338862A1
公开(公告)日：2017-11-23
申请号：US15669380
申请日：2017-08-04
Applicant: STMicroelectronics International N.V.
Inventor： Vinko Kunc , Maksimiljan Stiglic , Kosta Kovacic , Albin Pevec , Anton Stern
CPC classification number: H04B5/0056 , G06K7/10297 , G06K19/0701 , G06K19/0705 , G06K19/0723 , G06K19/0726 , H04B5/0075 , H04B5/0081
Abstract: A circuit of an actively transmitting tag includes an antenna, a digitizer, a voltage-controlled oscillator (VCO), an output amplifier, a phase-displacement detector, and a regulator. The input of the digitizer connects to the antenna. The outputs of the digitizer and the output amplifier are connected to the input terminals of the phase-displacement detector. The output amplifier connects the output of the VCO to the antenna and the regulator connects the output of the phase-displacement detector to the VCO.
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公开(公告)号：US20240364386A1
公开(公告)日：2024-10-31
申请号：US18646177
申请日：2024-04-25
Applicant: STMicroelectronics International N.V.
Inventor： Christophe Grundrich , Kosta Kovacic , Bruno Pierre Octave Leduc
CPC classification number: H04B5/43 , H02J7/0063
Abstract: In one example, an NFC controller includes a first node configured to be coupled to a battery and a second node configured to receive a regulated voltage from an external dc/dc converter coupled to the first node. A third node is configured to be coupled to a radio frequency output of the NFC controller. The third node is configured to be coupled to either the first node or the second node in a first mode, and to either to the first node or to first and second nodes in a second mode.
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公开(公告)号：US10911102B2
公开(公告)日：2021-02-02
申请号：US16793679
申请日：2020-02-18
Applicant: STMicroelectronics International N.V.
Inventor： Kosta Kovacic , Albin Pevec , Maksimiljan Stiglic
IPC: H04B5/00 , G06K7/00 , G06K19/07 , G06K19/077
Abstract: An RFID transponder includes a coding and modulation unit that generates a transmission signal by modulating an oscillator signal with an encoded bit signal. During a first and a second time segment, the encoded bit signal assumes a first and a second logic level, respectively. The transmission signal includes a first signal pulse having a first phase within the first time segment and a second signal pulse having a second phase that is shifted with respect to the first phase by a predefined phase difference within the second time segment. The transmission signal is paused for a pause period between the first and the second signal pulse. The pause period is shorter than a mean value of a period of the first time segment and a period of the second time segment.
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公开(公告)号：US10454532B2
公开(公告)日：2019-10-22
申请号：US15757771
申请日：2016-09-21
Applicant: STMicroelectronics International N.V.
Inventor： Kosta Kovacic , Albin Pevec
Abstract: When communicating using active load modulation in a Radio Frequency Identification (RFID) system, a carrier signal having a carrier frequency is received from a reader device. In response, a modulated signal is generated and a burst of a sending signal is transmitted. The sending signal is decayed at the end of the burst.
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公开(公告)号：US20180025267A1
公开(公告)日：2018-01-25
申请号：US15473295
申请日：2017-03-29
Applicant: STMicroelectronics International N.V.
Inventor： Vinko Kunc , Iztok Bratuz , Albin Pevec , Kosta Kovacic , Maksimiljan Stiglic
IPC: G06K19/07 , G06K19/077
CPC classification number: G06K19/0724 , G06K19/0772 , G06K19/0775 , H04L7/033
Abstract: In an embodiment, a carrier signal generation circuit can be used for a Radio-frequency identification (RFID) transponder device. A frequency divider circuit has a first input to receive a first frequency signal, a second input to receive a division ratio signal, and an output to provide a carrier signal as a function of the first frequency signal and the division ratio signal. A phase difference circuit has a first input to receive an analog reader device carrier signal, a second input to receive a signal based on the first frequency signal and an output to provide a digital phase difference signal as a function of the reader device carrier signal and the signal based on the first frequency signal. A signal processor has an input coupled to the output of the phase difference circuit.
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