公开(公告)号：US20210193221A1

公开(公告)日：2021-06-24

申请号：US17129016

申请日：2020-12-21

申请人： StMicroelectronics International N.V.

发明人： Maurizio Francesco Perroni ,  Fabio Enrico Carlo Disegni ,  Massimo Caruso ,  Cesare Torti

IPC分类号： G11C13/00

摘要： An embodiment non-volatile memory device includes an array of memory cells arranged in rows and columns; a plurality of local bitlines; and a plurality of main bitlines, each main bitline being coupleable to a corresponding subset of local bitlines. The memory cells of each column are coupled to a corresponding local bitline. The memory device further includes a column decoder, which can be controlled electronically so as to couple each main bitline to a selected local bitline of the corresponding subset of local bitlines. The column decoder couples each main bitline to two different points of the corresponding selected local bitline.

公开(公告)号：US11380393B2

公开(公告)日：2022-07-05

申请号：US17129016

申请日：2020-12-21

申请人： STMicroelectronics International N.V.

发明人： Maurizio Francesco Perroni ,  Fabio Enrico Carlo Disegni ,  Massimo Caruso ,  Cesare Torti

IPC分类号： G11C11/00 ,  G11C13/00

摘要： An embodiment non-volatile memory device includes an array of memory cells arranged in rows and columns; a plurality of local bitlines; and a plurality of main bitlines, each main bitline being coupleable to a corresponding subset of local bitlines. The memory cells of each column are coupled to a corresponding local bitline. The memory device further includes a column decoder, which can be controlled electronically so as to couple each main bitline to a selected local bitline of the corresponding subset of local bitlines. The column decoder couples each main bitline to two different points of the corresponding selected local bitline.