公开(公告)号：US20040263217A1

公开(公告)日：2004-12-30

申请号：US10827675

申请日：2004-04-19

Applicant: STMicroelectronics Limited

Inventor： Matt Hutson ,  Andrew Dellow ,  Tom Ryan ,  Paul Elliott

IPC: H03K003/00

CPC classification number: G06F1/08

Abstract: A clock source selector for selecting either a first clock signal A or a second clock signal B in accordance with a switch request signal includes three retiming circuits each consisting of two clocked flip-flops. The switch request signal is first retimed relative to clock A to give a signal P, is then retimed relative to clock B to give a signal Q, and finally is retimed relative to clock A to give a signal R. Selector circuitry operates such that when signal Q is asserted, the second clock signal B is output, when neither signal P nor signal R, as combined by a NOR gate, are asserted, the first clock signal A is output, and at other times a zero level is output. The clock source selector can be used in an integrated circuit to form a glitch-free multiplexer.