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公开(公告)号:US20030154043A1
公开(公告)日:2003-08-14
申请号:US10327705
申请日:2002-12-20
Applicant: STMicroelectronics Pvt. Ltd.
Inventor: Balwant Singh
IPC: G06F019/00 , G01R025/00 , G01R029/02
CPC classification number: G01R31/2882 , G01R29/02 , G01R31/3016 , G01R31/31937
Abstract: A system and method for providing improved resolution in the measuring the pulse width of digital signals comprising counting the integral number of measuring clock pulses covered by said digital pulse and triggering a chain of cascaded high resolution delay elements from the trailing edge of said measuring clock pulses. Further, the invention measures the delay count obtained from said chain of cascaded delay elements from the trailing edge of the last measuring clock pulse up to the end of said digital pulse, and adds said measured delay count to said integral measuring clock pulse count to obtain the total width of said digital pulse.
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2.
公开(公告)号:US20030117868A1
公开(公告)日:2003-06-26
申请号:US10321297
申请日:2002-12-17
Applicant: STMicroelectronics Pvt. Ltd.
Inventor: Balwant Singh
IPC: G11C007/00
CPC classification number: G11C29/50012 , G11C29/50
Abstract: A system for measuring a timing skew between two digital signals may include a clock generator for generating a time measurement clock, and a pulse-to-digital converter for converting the timing skew into an equivalent digital coded value after correcting for internal logic delays. The system may further include a register bank for storing the digital coded values, and a controller for generating control signals and sequences for controlling the operation of the pulse-to-digital converter and the register bank.
Abstract translation: 用于测量两个数字信号之间的定时偏差的系统可以包括用于产生时间测量时钟的时钟发生器和用于在校正内部逻辑延迟之后将定时偏差转换为等效数字编码值的脉冲 - 数字转换器。 该系统还可以包括用于存储数字编码值的寄存器组,以及用于产生用于控制脉冲数字转换器和寄存器组的操作的控制信号和序列的控制器。
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