Method of determining the time for polishing the surface of an integrated circuit wafer
    1.
    发明申请
    Method of determining the time for polishing the surface of an integrated circuit wafer 有权
    确定用于抛光集成电路晶片表面的时间的方法

    公开(公告)号:US20020031848A1

    公开(公告)日:2002-03-14

    申请号:US09898523

    申请日:2001-07-03

    Abstract: A method of determining the time for polishing the surface of an integrated circuit wafer on a polishing machine. A sample wafer is fabricated to include at least one high plateau and at least one low plateau joined by a sudden transition. At least one initial profile is topographically scanned, and the surface of the sample wafer is polished at a particular polishing pressure for a particular polishing time. The final profile of the polished layer is topographically scanned in the corresponding area, and the initial and final topographical scans of the sample wafer are converted into Fourier series. The surface of the wafer to be polished is topographically scanned, and the topographic scan of the wafer to be polished is converted into a Fourier series. The time for polishing the wafer to be polished is calculated from the Fourier series and the average thickness to be removed.

    Abstract translation: 确定在抛光机上抛光集成电路晶片的表面的时间的方法。 制造样品晶片以包括至少一个高平台和至少一个通过突然过渡连接的低平台。 至少一个初始轮廓被地形扫描,并且在特定抛光压力下抛光样品晶片的表面以达到特定的抛光时间。 将抛光层的最终轮廓在相应的区域进行地形扫描,并将样品晶片的初始和最终的地形扫描转换为傅立叶级数。 将待研磨的晶片的表面进行地形扫描,并将要抛光的晶片的地形扫描转换为傅立叶级数。 抛光抛光晶片的时间由傅立叶级数和要去除的平均厚度计算。

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