公开(公告)号：US20030001228A1

公开(公告)日：2003-01-02

申请号：US10165051

申请日：2002-06-07

Applicant: STMicroelectronics S.A.

Inventor： Philippe Boivin ,  Francesco La Rosa

IPC: H01L029/00

CPC classification number: H01L27/0255 ,  H01L27/0251

Abstract: An integrated circuit on a silicon substrate includes at least one polysilicon line and at least one antistatic contact connecting the polysilicon line to the silicon substrate. The antistatic contact includes a thin oxide layer between the polysilicon line and the silicon substrate. The thin oxide layer is of a sufficiently small thickness so that a current flows across it by the tunnel effect when the polysilicon line is brought, relatively to the substrate, to a voltage greater or less than determined thresholds.

Abstract translation: 硅衬底上的集成电路包括至少一个多晶硅线和将多晶硅线连接到硅衬底的至少一个抗静电接触。 抗静电接触包括在多晶硅线和硅衬底之间的薄氧化层。 薄氧化物层具有足够小的厚度，使得当多晶硅线相对于衬底被带到大于或小于确定的阈值的电压时，电流通过隧道效应流过它。