公开(公告)号：US09384315B2

公开(公告)日：2016-07-05

申请号：US14325088

申请日：2014-07-07

Applicant: STMicroelectronics S.r.l.

Inventor： Mattia Monetti ,  Alberto Balzarotti

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5036 ,  G06F17/5068 ,  G06F17/5081 ,  G06F2217/78 ,  G06F2217/80

Abstract: A method for the automatic design of an electronic circuit includes operations for evaluation of the thermal effects in the electronic circuit. The method generates a layout of the electronic circuit. Abstract data at the substrate level associated to the layout of the electronic circuit is then generated. A grid of partitioning is generated with respect to a view regarding the aforesaid abstract into meshes and nodes. The grid is applied to the substrate. On the basis of the grid (TG), a list of nodes or netlist representing a thermal network that represents the thermal behavior of the substrate or of its portions or elements is extracted. The netlist is useful in simulation operations, in particular of a SPICE type, for making an evaluation of thermal effects in the electronic circuit.

Abstract translation: 电子电路的自动设计方法包括用于评估电子电路中的热效应的操作。 该方法生成电子电路的布局。 然后生成与电子电路的布局相关联的基板级的抽象数据。 相对于关于上述抽象到网格和节点的视图产生划分网格。 栅格被施加到基板上。 基于网格（TG），提取表示表示基板或其部分或元件的热行为的热网络的节点或网表的列表。 网表在仿真操作中尤其是SPICE类型有用，用于评估电子电路中的热效应。

公开(公告)号：US20150019194A1

公开(公告)日：2015-01-15

申请号：US14324905

申请日：2014-07-07

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Roberto Stella ,  Alberto Balzarotti

IPC: G06F17/50

CPC classification number: G06F17/5036 ,  G06F2217/80

Abstract: A method for automatic design of a circuit evaluates thermal effects and electrical effects in a coupled way. A description of the circuit is obtained in terms of a list of simulator nodes or netlist. Using the description, the electrical behavior of the circuit and the thermal behavior of the circuit is simulated. The simulation includes configuring the simulation operation for operating with descriptions of models or sub-circuits of the circuit that are defined using a thermal node. An equivalent current generator is connected to the thermal node to force an equivalent current representing dissipated power. A voltage that is produced on the thermal node is associated with an increase in temperature of the model or sub-circuit with respect to the global temperature.

Abstract translation: 电路的自动设计方法以耦合的方式评估热效应和电效应。 根据模拟器节点或网表的列表获得电路的描述。 使用描述，模拟电路的电气行为和电路的热性能。 仿真包括配置仿真操作，以便使用热节点定义的电路模型或子电路的描述进行操作。 等效电流发生器连接到热节点以强制表示耗散功率的等效电流。 在热节点上产生的电压与模型或子电路相对于全局温度的温度升高相关联。

公开(公告)号：US20150020040A1

公开(公告)日：2015-01-15

申请号：US14325088

申请日：2014-07-07

Applicant: STMicroelectronics S.r.l.

Inventor： Mattia Monetti ,  Alberto Balzarotti

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5036 ,  G06F17/5068 ,  G06F17/5081 ,  G06F2217/78 ,  G06F2217/80

Abstract: A method for the automatic design of an electronic circuit includes operations for evaluation of the thermal effects in the electronic circuit. The method generates a layout of the electronic circuit. Abstract data at the substrate level associated to the layout of the electronic circuit is then generated. A grid of partitioning is generated with respect to a view regarding the aforesaid abstract into meshes and nodes. The grid is applied to the substrate. On the basis of the grid (TG), a list of nodes or netlist representing a thermal network that represents the thermal behavior of the substrate or of its portions or elements is extracted. The netlist is useful in simulation operations, in particular of a SPICE type, for making an evaluation of thermal effects in the electronic circuit.

Abstract translation: 电子电路的自动设计方法包括用于评估电子电路中的热效应的操作。 该方法生成电子电路的布局。 然后生成与电子电路的布局相关联的基板级的抽象数据。 相对于关于上述抽象到网格和节点的视图产生划分网格。 栅格被施加到基板上。 基于网格（TG），提取表示表示基板或其部分或元件的热行为的热网络的节点或网表的列表。 网表在仿真操作中尤其是SPICE类型有用，用于评估电子电路中的热效应。