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公开(公告)号：US10804796B2
公开(公告)日：2020-10-13
申请号：US16269195
申请日：2019-02-06
发明人： Edoardo Botti , Arunkumar Salimath , Edoardo Bonizzoni , Franco Maloberti , Paolo Cacciagrano , Davide Luigi Brambilla
IPC分类号： H02M3/07 , H03F3/217 , B60R16/033 , H04R3/00 , H02M3/00 , H02M3/158 , H03F1/02 , H03F3/187 , H02M1/00
摘要： A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.
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公开(公告)号：US12073860B2
公开(公告)日：2024-08-27
申请号：US18191639
申请日：2023-03-28
发明人： Dario Livornesi , Alessio Emanuele Vergani , Paolo Pulici , Francesco Piscitelli , Enrico Mammei , Mojtaba Mohammadi Abdevand , Piero Malcovati , Edoardo Bonizzoni
CPC分类号： G11B5/6029 , G11B5/607 , H03F1/0261
摘要： According to an embodiment, a circuit includes a biasing and a low-frequency recovery circuit. The biasing circuit includes a voltage digital to analog converter (V-DAC), a differential difference amplifier coupled to the V-DAC, a common-mode feedback (CMFB) amplifier coupled to the differential difference amplifier, and a first pair of transistors arranged as a high-impedance structure and coupled to the differential difference amplifier and the CMFB amplifier. The low-frequency recovery circuit includes a current digital to analog converter (C-DAC), a second pair of transistors arranged as a high-impedance structure and coupled to the first pair of transistors, a pair of resistors having a resistance value equal to half a resistance of the resistive sensor, the pair of resistors arranged between the second pair of transistors and coupled to the C-DAC, and a gain circuit coupled to shared nodes between the second pair of transistors and the pair of resistors.
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3.发明公开公开(公告)号：US20230353052A1
公开(公告)日：2023-11-02
申请号：US18300945
申请日：2023-04-14
CPC分类号： H02M3/158 , H02M1/0009 , H02M1/083
摘要： A control module, for a resonant switched-capacitor converter with an inductor, includes a controller stage, an input stage generating a control signal indicating a control quantity, a delay stage generating a duration signal indicating a time quantity, and a circuit indicating zero crossings of the inductor current. If the control quantity is variable, the input stage clamps the control quantity to a control threshold. When in normal mode, the controller stage controls the converter to carry out a phase sequence with timings that depend on the zero crossings and the time quantity, so the converter generates an output current that depends on the time quantity and is prevented from dropping below a minimum current. If the output voltage reaches an upper threshold, the controller stage switches into pulse-skipping mode to suspend the phase sequence, and resumes the phase sequence after the output voltage drops to a lower threshold.
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公开(公告)号：US20230386514A1
公开(公告)日：2023-11-30
申请号：US18191639
申请日：2023-03-28
发明人： Dario Livornesi , Alessio Emanuele Vergani , Paolo Pulici , Francesco Piscitelli , Enrico Mammei , Mojtaba Mohammadi Abdevand , Piero Malcovati , Edoardo Bonizzoni
CPC分类号： G11B5/6029 , G11B5/607 , H03F1/0261
摘要： According to an embodiment, a circuit includes a biasing and a low-frequency recovery circuit. The biasing circuit includes a voltage digital to analog converter (V-DAC), a differential difference amplifier coupled to the V-DAC, a common-mode feedback (CMFB) amplifier coupled to the differential difference amplifier, and a first pair of transistors arranged as a high-impedance structure and coupled to the differential difference amplifier and the CMFB amplifier. The low-frequency recovery circuit includes a current digital to analog converter (C-DAC), a second pair of transistors arranged as a high-impedance structure and coupled to the first pair of transistors, a pair of resistors having a resistance value equal to half a resistance of the resistive sensor, the pair of resistors arranged between the second pair of transistors and coupled to the C-DAC, and a gain circuit coupled to shared nodes between the second pair of transistors and the pair of resistors.
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5.发明公开公开(公告)号：US20230327555A1
公开(公告)日：2023-10-12
申请号：US18295538
申请日：2023-04-04
CPC分类号： H02M3/158 , H02M3/07 , H02M1/0025
摘要： A control module, for a resonant switched-capacitor converter having first, second, third and fourth cascaded switches and generating an output voltage, includes a timing circuit generating a clock, a controller generating first and second control signals indicating, respectively, first and second control quantities, the difference between which being a function of the difference between a reference quantity and a feedback quantity depending on the output voltage, first and second delay circuits that generate first and second logic signals and, respectively, third and fourth logic signals, the first and third logic signals being delayed with respect to the clock as a function of, respectively, the first and second control quantities, the second and fourth control signals being respectively the logic negation of the first and third logic signals, and a driver that controls the first, second, third, and fourth switches based on, respectively, the first, second, third, and fourth logic signals.
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6.发明申请公开(公告)号：US20190245435A1
公开(公告)日：2019-08-08
申请号：US16269195
申请日：2019-02-06
发明人： Edoardo Botti , Arunkumar Salimath , Edoardo Bonizzoni , Franco Maloberti , Paolo Cacciagrano , Davide Luigi Brambilla
IPC分类号： H02M3/07 , H03F3/217 , H04R3/00 , B60R16/033
摘要： A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.
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