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公开(公告)号：US11245369B2
公开(公告)日：2022-02-08
申请号：US16935649
申请日：2020-07-22
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Tommaso Barbieri , Davide Luigi Brambilla , Cristiano Meroni
IPC: H03F3/217 , H03K17/687 , H03K3/017 , H04R3/00 , G05F1/575 , H03F1/02 , H02M3/158 , H02M3/00 , H03F3/187 , H02M1/00
Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
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公开(公告)号：US20200350877A1
公开(公告)日：2020-11-05
申请号：US16935649
申请日：2020-07-22
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Tommaso Barbieri , Davide Luigi Brambilla , Cristiano Meroni
IPC: H03F3/217 , H03K17/687 , H03K3/017 , H04R3/00 , G05F1/575 , H03F1/02 , H02M3/158 , H02M3/00 , H03F3/187
Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
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公开(公告)号：US10935592B2
公开(公告)日：2021-03-02
申请号：US16057089
申请日：2018-08-07
Inventor： Edoardo Botti , Davide Luigi Brambilla , Hong Wu Lin
IPC: G01R31/26 , H03K17/0814 , G05F3/08 , G01R19/00 , H03K17/687
Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.
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公开(公告)号：US10804796B2
公开(公告)日：2020-10-13
申请号：US16269195
申请日：2019-02-06
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Arunkumar Salimath , Edoardo Bonizzoni , Franco Maloberti , Paolo Cacciagrano , Davide Luigi Brambilla
IPC: H02M3/07 , H03F3/217 , B60R16/033 , H04R3/00 , H02M3/00 , H02M3/158 , H03F1/02 , H03F3/187 , H02M1/00
Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.
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Patent Agency Ranking
公开(公告)号：US20230378923A1
公开(公告)日：2023-11-23
申请号：US17747845
申请日：2022-05-18
Inventor： Jian Wen , Davide Luigi Brambilla , Qiyu Liu , Mei Yang , Shuming Tong , Francesco Stilgenbauer
CPC classification number: H03G3/3026 , H03G3/348 , H03G3/3036 , H03K4/06
Abstract: In an embodiment, an amplifier circuit includes a second stage that includes a first switch circuit including first and second terminals, a plurality of resistive elements coupled between the first and second terminals of the first switch circuit, and a plurality of switches configured to control an equivalent resistance between the first and second terminals of the first switch circuit. During play mode, the second stage has a gain between the input of the second stage and the output of the second stage of a first value. During a transition from mute mode to play mode, the amplifier circuit is configured to progressively increase the gain of the second stage from a second value to the first value. During a transition from play mode to mute mode, the amplifier circuit is configured to progressively decrease the gain of the second stage from the first value to the second value.
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公开(公告)号：US20190245498A1
公开(公告)日：2019-08-08
申请号：US16269289
申请日：2019-02-06
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Tommaso Barbieri , Davide Luigi Brambilla , Cristiano Meroni
IPC: H03F3/217 , H03K17/687 , H03K3/017 , H04R3/00
Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
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公开(公告)号：US10763803B2
公开(公告)日：2020-09-01
申请号：US16269289
申请日：2019-02-06
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Tommaso Barbieri , Davide Luigi Brambilla , Cristiano Meroni
IPC: H03F3/217 , H03K17/687 , H03K3/017 , H04R3/00 , G05F1/575 , H03F1/02 , H02M3/158 , H02M3/00 , H03F3/187 , H02M1/00
Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
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8.发明申请公开(公告)号：US20190245435A1
公开(公告)日：2019-08-08
申请号：US16269195
申请日：2019-02-06
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Arunkumar Salimath , Edoardo Bonizzoni , Franco Maloberti , Paolo Cacciagrano , Davide Luigi Brambilla
IPC: H02M3/07 , H03F3/217 , H04R3/00 , B60R16/033
Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.
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公开(公告)号：US20190049511A1
公开(公告)日：2019-02-14
申请号：US16057089
申请日：2018-08-07
Inventor： Edoardo Botti , Davide Luigi Brambilla , Hong Wu Lin
IPC: G01R31/26 , H03K17/687 , G01R19/00
Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.
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