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1.发明公开公开(公告)号：US20230327555A1
公开(公告)日：2023-10-12
申请号：US18295538
申请日：2023-04-04
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Nicolosi , Alessandra Farina , Edoardo Bonizzoni
CPC classification number: H02M3/158 , H02M3/07 , H02M1/0025
Abstract: A control module, for a resonant switched-capacitor converter having first, second, third and fourth cascaded switches and generating an output voltage, includes a timing circuit generating a clock, a controller generating first and second control signals indicating, respectively, first and second control quantities, the difference between which being a function of the difference between a reference quantity and a feedback quantity depending on the output voltage, first and second delay circuits that generate first and second logic signals and, respectively, third and fourth logic signals, the first and third logic signals being delayed with respect to the clock as a function of, respectively, the first and second control quantities, the second and fourth control signals being respectively the logic negation of the first and third logic signals, and a driver that controls the first, second, third, and fourth switches based on, respectively, the first, second, third, and fourth logic signals.
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公开(公告)号：US11955877B2
公开(公告)日：2024-04-09
申请号：US17387296
申请日：2021-07-28
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Nicolosi , Giovanni Sicurella
CPC classification number: H02M1/0035 , H02M3/158
Abstract: A method to operate a DC-DC power converter in a low power burst mode, the method including sampling an output voltage of the DC-DC power converter with a sampling frequency to determine when to initiate a burst for the low power burst mode; and adapting the sampling frequency based on the output voltage.
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公开(公告)号：US11784566B2
公开(公告)日：2023-10-10
申请号：US17526984
申请日：2021-11-15
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Nicolosi
Abstract: In an embodiment a direct current to direct current (DC-DC) converter includes a first switching circuit configured to switch a supply of an input voltage to an energy storage circuit configured to generate an output voltage, a driving circuit configured to drive the first switching circuit according to a comparison between the output voltage and a comparison voltage and a soft-start circuit configured to raise the comparison voltage from a start voltage to a target voltage during a soft-start phase of the DC-DC converter having a soft-start duration, wherein the soft-start circuit comprises a soft-start capacitor configured to provide the comparison voltage during the start phase, the soft-start capacitor having a soft-start capacitance, an auxiliary capacitor having an auxiliary capacitance, a second switching circuit configured to alternately charge and discharge the auxiliary capacitor with an auxiliary current according to a clock signal having a clock frequency and a charging circuit.
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公开(公告)号：US12081122B2
公开(公告)日：2024-09-03
申请号：US17532867
申请日：2021-11-22
Applicant: STMicroelectronics S.r.l.
Inventor： Niccolo′ Brambilla , Sandro Rossi , Valeria Bottarel , Alessandro Nicolosi
IPC: H02M1/08 , H02M1/00 , H02M3/158 , H03K17/687
CPC classification number: H02M3/158 , H02M1/0006 , H02M1/08 , H03K17/687 , H03K2217/0081
Abstract: In an embodiment, a switching converter includes: a switching stage configured to receive a direct current input voltage, receive a driving signal for driving the switching stage, and provide a direct current output voltage according to the input voltage and the driving signal; a driving stage configured to provide the driving signal to the switching stage; a current sensing circuit configure to sense an output current provided by the switching stage; and a voltage generation circuit configured to generate at least one supply voltage for powering the driving stage, and adjust the at least one supply voltage according to the output current.
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公开(公告)号：US09754681B2
公开(公告)日：2017-09-05
申请号：US15446909
申请日：2017-03-01
Applicant: STMicroelectronics S.r.l.
CPC classification number: G11C17/18 , G11C11/4125 , G11C17/16 , H03K3/02335 , H03K19/00338 , H03K19/17764
Abstract: A radiation hardened memory cell includes an odd number of storage elements configured to redundantly store an input data logic signal. The storage elements include output lines for outputting respective logic signals having respective logic values. A logic combination network receives the respective logic signals and is configured to generate an output signal having a same logic value as a majority of the logic signals output from the storage elements. An exclusive logic sum circuit receives the respective logic signals output from the storage elements and is configured to produce a refresh of the logic data signal as stored in the storage elements when one of the logic signals output from the storage elements undergoes a logic value transition due to an error event.
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Patent Agency Ranking
6.发明公开公开(公告)号：US20230353052A1
公开(公告)日：2023-11-02
申请号：US18300945
申请日：2023-04-14
Applicant: STMicroelectronics S.r.l
Inventor： Alessandro Nicolosi , Alessandra Farina , Edoardo Bonizzoni
CPC classification number: H02M3/158 , H02M1/0009 , H02M1/083
Abstract: A control module, for a resonant switched-capacitor converter with an inductor, includes a controller stage, an input stage generating a control signal indicating a control quantity, a delay stage generating a duration signal indicating a time quantity, and a circuit indicating zero crossings of the inductor current. If the control quantity is variable, the input stage clamps the control quantity to a control threshold. When in normal mode, the controller stage controls the converter to carry out a phase sequence with timings that depend on the zero crossings and the time quantity, so the converter generates an output current that depends on the time quantity and is prevented from dropping below a minimum current. If the output voltage reaches an upper threshold, the controller stage switches into pulse-skipping mode to suspend the phase sequence, and resumes the phase sequence after the output voltage drops to a lower threshold.
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公开(公告)号：US11626880B2
公开(公告)日：2023-04-11
申请号：US17450711
申请日：2021-10-13
Applicant: STMicroelectronics S.r.l.
Inventor： Liliana Arcidiacono , Alessandro Nicolosi , Valeria Bottarel
IPC: H03K19/17736 , H03K19/08
Abstract: A circuit receives an input signal having a first level and a second level. A logic circuit includes a finite state machine circuit, an edge detector circuit, and a timer circuit. The finite state machine circuit is configured to set a mode of operation of the circuit. The edge detector circuit is configured to detect a transition between the first and second level. The timer circuit is configured to determine whether the first or second level is maintained over an interval, which starts from a transition detected by the edge detector circuit. The finite state machine circuit is configured to change the mode of operation based on the timer circuit determining that the first or second level has been maintained over the interval.
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公开(公告)号：US20220166321A1
公开(公告)日：2022-05-26
申请号：US17532867
申请日：2021-11-22
Applicant: STMicroelectronics S.r.l.
Inventor： Niccolo' Brambilla , Sandro Rossi , Valeria Bottarel , Alessandro Nicolosi
IPC: H02M3/158 , H02M1/08 , H02M1/00 , H03K17/687
Abstract: In an embodiment, a switching converter includes: a switching stage configured to receive a direct current input voltage, receive a driving signal for driving the switching stage, and provide a direct current output voltage according to the input voltage and the driving signal; a driving stage configured to provide the driving signal to the switching stage; a current sensing circuit configure to sense an output current provided by the switching stage; and a voltage generation circuit configured to generate at least one supply voltage for powering the driving stage, and adjust the at least one supply voltage according to the output current.
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公开(公告)号：US20220166320A1
公开(公告)日：2022-05-26
申请号：US17532833
申请日：2021-11-22
Applicant: STMicroelectronics S.r.l.
Inventor： Niccolo' Brambilla , Sandro Rossi , Valeria Bottarel , Alessandro Nicolosi
Abstract: In an embodiment, a switching converter includes: a switching stage including first and second switching devices for receiving an input voltage and for providing an output voltage; a driving stage including first and second driving devices for driving the first and second switching devices, respectively; a current sensing arrangement for sensing an output current provided by the switching stage; a voltage generation arrangement configured to generate a supply voltage for powering the driving stage, the voltage generation arrangement being configured to adjust the supply voltage according to the sensed output current; and a charge recovery stage configured to store a first electric charge being lost from the first driving device during driving of the first switching device and to release at least partially the stored first electric charge to the second driving device during driving of the second switching device.
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公开(公告)号：US20220149844A1
公开(公告)日：2022-05-12
申请号：US17450711
申请日：2021-10-13
Applicant: STMicroelectronics S.r.l.
Inventor： Liliana Arcidiacono , Alessandro Nicolosi , Valeria Bottarel
IPC: H03K19/17736 , H03K19/08
Abstract: A circuit receives an input signal having a first level and a second level. A logic circuit includes a finite state machine circuit, an edge detector circuit, and a timer circuit. The finite state machine circuit is configured to set a mode of operation of the circuit. The edge detector circuit is configured to detect a transition between the first and second level. The timer circuit is configured to determine whether the first or second level is maintained over an interval, which starts from a transition detected by the edge detector circuit. The finite state machine circuit is configured to change the mode of operation based on the timer circuit determining that the first or second level has been maintained over the interval.
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