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公开(公告)号：US11756582B1
公开(公告)日：2023-09-12
申请号：US17742202
申请日：2022-05-11
发明人： Paolo Pulici , Dennis Hogg , Michele Bartolini , Enrico Sentieri , Enrico Mammei
CPC分类号： G11B5/6017 , G11B21/106
摘要： A system for determining a fly height includes a first head of a disk drive, a second head of the disk drive, a capacitive sensor circuit coupled to the first head and the second head, and a logic device coupled to the capacitive sensor circuit. The capacitive sensor circuit is configured to measure a first capacitance between the first head and the first disk, remove noise from the first capacitance using a second capacitance between the second head and the second disk, and based thereon determine a corrected first capacitance. The logic device is configured to determine the fly height between the first head and the first disk using the corrected first capacitance.
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公开(公告)号：US11657846B1
公开(公告)日：2023-05-23
申请号：US17710608
申请日：2022-03-31
发明人： Enrico Mammei , Paolo Sanna , Dennis Hogg , Edoardo Contini
IPC分类号： G11B20/10
CPC分类号： G11B20/10027
摘要： A method to determine a relative delay between a current-overshoot signal and a write data signal for a hard disk drive preamplifier, the method including using a memory element to strobe a test current-overshoot signal with a test data signal; counting a number of strobed transitions of the test current-overshoot signal; adjusting the delay based on the number of strobed transitions; setting a phase difference between the current-overshoot signal and the write data signal according to the delay; and using the memory element to strobe the current-overshoot signal with the write data signal.
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公开(公告)号：US11720128B2
公开(公告)日：2023-08-08
申请号：US17362532
申请日：2021-06-29
摘要： In an embodiment, a linear voltage regulator includes: an output transistor having a first current path terminal configured to be coupled to a load, and a second current path terminal coupled to a first supply terminal, where the output transistor is configured to provide, at the first current path terminal, a regulated output voltage; a voltage source circuit configured to provide, in an open loop manner, a first voltage to a control terminal of the output transistor; and a feedback loop coupled between the first current path terminal of the output transistor and the control terminal of the output transistor, the feedback loop including a sense transistor having a first current path terminal coupled to the first current path terminal of the output transistor.
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公开(公告)号：US12073860B2
公开(公告)日：2024-08-27
申请号：US18191639
申请日：2023-03-28
发明人： Dario Livornesi , Alessio Emanuele Vergani , Paolo Pulici , Francesco Piscitelli , Enrico Mammei , Mojtaba Mohammadi Abdevand , Piero Malcovati , Edoardo Bonizzoni
CPC分类号： G11B5/6029 , G11B5/607 , H03F1/0261
摘要： According to an embodiment, a circuit includes a biasing and a low-frequency recovery circuit. The biasing circuit includes a voltage digital to analog converter (V-DAC), a differential difference amplifier coupled to the V-DAC, a common-mode feedback (CMFB) amplifier coupled to the differential difference amplifier, and a first pair of transistors arranged as a high-impedance structure and coupled to the differential difference amplifier and the CMFB amplifier. The low-frequency recovery circuit includes a current digital to analog converter (C-DAC), a second pair of transistors arranged as a high-impedance structure and coupled to the first pair of transistors, a pair of resistors having a resistance value equal to half a resistance of the resistive sensor, the pair of resistors arranged between the second pair of transistors and coupled to the C-DAC, and a gain circuit coupled to shared nodes between the second pair of transistors and the pair of resistors.
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公开(公告)号：US12052029B2
公开(公告)日：2024-07-30
申请号：US17690847
申请日：2022-03-09
发明人： Nicola Lupo , Enrico Mammei , Michele Bartolini , Stefano Colli
摘要： A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.
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公开(公告)号：US20240177732A1
公开(公告)日：2024-05-30
申请号：US18432776
申请日：2024-02-05
发明人： Marco Mazzini , Marco Ciuffolini , Enrico Mammei , Paolo Pulici
CPC分类号： G11B5/012 , G05F1/56 , H05B3/22 , G11B2005/0021
摘要： In accordance with an embodiment, a circuit is configured to vary an intensity of a drive current of a resistive heater element based on the digital control signal. The circuit includes and output circuit configured to control a respective slew rate and an electric energy dissipated in the resistive heater element independently of a resistance value of the resistive heater element.
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公开(公告)号：US20240356561A1
公开(公告)日：2024-10-24
申请号：US18762215
申请日：2024-07-02
发明人： Nicola Lupo , Enrico Mammei , Michele Bartolini , Stefano Colli
摘要： A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.
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公开(公告)号：US20230386514A1
公开(公告)日：2023-11-30
申请号：US18191639
申请日：2023-03-28
发明人： Dario Livornesi , Alessio Emanuele Vergani , Paolo Pulici , Francesco Piscitelli , Enrico Mammei , Mojtaba Mohammadi Abdevand , Piero Malcovati , Edoardo Bonizzoni
CPC分类号： G11B5/6029 , G11B5/607 , H03F1/0261
摘要： According to an embodiment, a circuit includes a biasing and a low-frequency recovery circuit. The biasing circuit includes a voltage digital to analog converter (V-DAC), a differential difference amplifier coupled to the V-DAC, a common-mode feedback (CMFB) amplifier coupled to the differential difference amplifier, and a first pair of transistors arranged as a high-impedance structure and coupled to the differential difference amplifier and the CMFB amplifier. The low-frequency recovery circuit includes a current digital to analog converter (C-DAC), a second pair of transistors arranged as a high-impedance structure and coupled to the first pair of transistors, a pair of resistors having a resistance value equal to half a resistance of the resistive sensor, the pair of resistors arranged between the second pair of transistors and coupled to the C-DAC, and a gain circuit coupled to shared nodes between the second pair of transistors and the pair of resistors.
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公开(公告)号：US20230291416A1
公开(公告)日：2023-09-14
申请号：US17690847
申请日：2022-03-09
发明人： Nicola Lupo , Enrico Mammei , Michele Bartolini , Stefano Colli
摘要： A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.
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公开(公告)号：US20220413531A1
公开(公告)日：2022-12-29
申请号：US17362532
申请日：2021-06-29
摘要： In an embodiment, a linear voltage regulator includes: an output transistor having a first current path terminal configured to be coupled to a load, and a second current path terminal coupled to a first supply terminal, where the output transistor is configured to provide, at the first current path terminal, a regulated output voltage; a voltage source circuit configured to provide, in an open loop manner, a first voltage to a control terminal of the output transistor; and a feedback loop coupled between the first current path terminal of the output transistor and the control terminal of the output transistor, the feedback loop including a sense transistor having a first current path terminal coupled to the first current path terminal of the output transistor.
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