Abstract:
A circuit includes: a communication interface configured to receive data; a plurality of output terminals; a bank of input registers coupled to the communication interface; a bank of buffer registers; a bank of output registers; a signal generator configured to generate a plurality of output signals based on respective registers of the bank of output registers at respective output terminals; and a conversion stage configured to: when data is received by the bank of input registers from the communication interface, sequentially convert content of the input registers of the bank of input registers and store the converted content into corresponding buffer registers of the bank of buffer registers based on a conversion function, and when the conversion stage finishes storing the converted content into the buffer registers, simultaneously copy content from the buffer registers into corresponding output registers of the bank of output registers.
Abstract:
An array of LED diodes includes N channels each having LEDs coupled in series with a switch. A current driver for the array includes a processing circuit configured to detect N currents flowing respectively through the N channels of the array. The detected currents are converted by a single analog to digital converter, one at a time, into a digital word. The circuit further includes N comparator devices configured to control the N switches as result of a comparison between the digital words and respective target digital words. A memory is provided for storing the digital words received from the analog to digital converter.
Abstract:
A current driver for a string of LEDs includes a first series connection of a first transistor and a first resistance and a second series connection of a second transistor and a second resistance. The first and second series connections are coupled in parallel between the string of LEDs and a voltage reference. An operational amplifier selectively drives the first and second transistors in response to a clock signal. A switch device driven by the clock signal alternately applies a reference voltage and a respective one of the voltages across the first and second resistances to inverting and non-inverting inputs of the operational amplifier in response to the clock signal. A storage circuit is coupled to the output of the operational amplifier to store the drive signals for the first and second transistors for application to the first and second transistors in the absence of output from the operational amplifier.
Abstract:
An embodiment of an apparatus, such as a circuit breaker, includes an input node, an output node, and a digital circuit. The input node is configured to receive an input voltage, and the output node is coupled to the input node and is configured to carry an output current. And the digital circuit is configured to uncouple the output node from the input node in response to a power drawn from the input node exceeding a threshold.
Abstract:
An array of LED diodes includes N channels each having LEDs coupled in series with a switch. A current driver for the array includes a processing circuit configured to detect N currents flowing respectively through the N channels of the array. The detected currents are converted by a single analog to digital converter, one at a time, into a digital word. The circuit further includes N comparator devices configured to control the N switches as result of a comparison between the digital words and respective target digital words. A memory is provided for storing the digital words received from the analog to digital converter.
Abstract:
A current driver for a string of LEDs includes a first series connection of a first transistor and a first resistance and a second series connection of a second transistor and a second resistance. The first and second series connections are coupled in parallel between the string of LEDs and a voltage reference. An operational amplifier selectively drives the first and second transistors in response to a clock signal. A switch device driven by the clock signal alternately applies a reference voltage and a respective one of the voltages across the first and second resistances to inverting and non-inverting inputs of the operational amplifier in response to the clock signal. A storage circuit is coupled to the output of the operational amplifier to store the drive signals for the first and second transistors for application to the first and second transistors in the absence of output from the operational amplifier.