公开(公告)号：US20040187088A1

公开(公告)日：2004-09-23

申请号：US10770836

申请日：2004-02-03

Applicant: STMicroelectronics SA

Inventor： Joel Cambonie

IPC: G06F017/50

CPC classification number: H03K19/17736 ,  G06F15/7867 ,  H03K19/17732 ,  H03K19/1774 ,  Y02D10/12 ,  Y02D10/13

Abstract: The configurable electronic device comprises a configurable electronic device includes at least one configurable basic assembly. The basic assembly includes a programmable circuit having a plurality of programmable elements, and a first configurable interconnection network for mutually connecting the programmable circuits. A plurality of configurable arithmetic cells are mutually connected by a second configurable interconnection network. A third configurable interconnection network links the programmable circuit and the configurable arithmetic cells. A control bus is between the programmable circuit and the configurable arithmetic cells, and also extends within the configurable arithmetic cells.

Abstract translation: 可配置电子设备包括可配置电子设备，其包括至少一个可配置的基本组件。 基本组件包括具有多个可编程元件的可编程电路和用于相互连接可编程电路的第一可配置互连网络。 多个可配置的算术单元通过第二可配置互连网络相互连接。 第三可配置互连网络链接可编程电路和可配置的算术单元。 控制总线在可编程电路和可配置的算术单元之间，并且还可在可配置的算术单元内延伸。

公开(公告)号：US20040225704A1

公开(公告)日：2004-11-11

申请号：US10768997

申请日：2004-01-30

Applicant: STMicroelectronics SA

Inventor： Joel Cambonie

IPC: G06F007/38

CPC classification number: G06F7/5324 ,  G06F7/57 ,  G06F15/7867 ,  G06F2207/382 ,  H03K19/17728 ,  H03K19/17732 ,  H03K19/17736

Abstract: A configurable electronic circuit includes at least one tile that includes a plurality of cells interconnected. Each cell includes a multiplier, an arithmetic and logic unit for performing at least one arithmetic and/or logic function from a set of functions, a vertical bus, and a first configurable switching circuit connected to the vertical bus and to inputs of the multiplier. Each cell further includes a second configurable switching circuit connected to the vertical bus and to an output of the multiplier, a third configurable switching circuit connected to the vertical bus and to an output of the multiplier in a different cell, a fourth configurable switching circuit connected to the vertical bus and to inputs of the arithmetic and logic unit, and a fifth configurable switching circuit connected to the vertical bus and to an output of the arithmetic and logic unit.

Abstract translation: 可配置电子电路包括至少一个瓦片，其包括互连的多个单元。 每个单元包括乘法器，算术和逻辑单元，用于从一组函数执行至少一个算术和/或逻辑函数，垂直总线以及连接到垂直总线和乘法器的输入的第一可配置开关电路。 每个单元还包括连接到垂直总线和乘法器的输出的第二可配置开关电路，连接到垂直总线和不同单元中乘法器的输出的第三可配置开关电路，连接到第四可配置开关电路 到垂直总线和算术和逻辑单元的输入，以及连接到垂直总线和算术和逻辑单元的输出的第五可配置开关电路。