公开(公告)号：US20150055430A1

公开(公告)日：2015-02-26

申请号：US14257072

申请日：2014-04-21

申请人： SU-YONG KIM ,  LEE JINYUB ,  LEE SEUNGJAE

发明人： SU-YONG KIM ,  LEE JINYUB ,  LEE SEUNGJAE

IPC分类号： G11C8/08 ,  G11C8/10

CPC分类号： G11C8/08 ,  G11C11/4085 ,  G11C16/08

摘要： A nonvolatile memory device comprises multiple memory blocks each comprising multiple memory cells arranged at intersections of wordlines and bitlines, an address decoder configured to electrically connect first lines to wordlines of one of the memory blocks in response to an address, a line selection switch circuit configured to electrically connect the first lines to second lines in different configurations according to the address, a first line decoder configured to provide the second lines with wordline voltages needed for driving, and a voltage generator configured to generate the wordline voltages.

摘要翻译： 非易失性存储器件包括多个存储器块，每个存储器块包括布置在字线和位线的交点处的多个存储器单元，地址解码器被配置为响应于地址将第一行电路连接到一个存储器块的字线，配置线路选择开关电路 根据地址将第一线路电连接到不同配置的第二线路，第一线路解码器，被配置为向第二线路提供用于驱动所需的字线电压;以及电压发生器，被配置为产生字线电压。