公开(公告)号：US20230195314A1

公开(公告)日：2023-06-22

申请号：US18059971

申请日：2022-11-29

Applicant: SUNRISE MEMORY CORPORATION

Inventor： Masahiro Yoshihara ,  Tz-Yi Liu ,  Raul Adrian Cernea ,  Shay Fux ,  Erez Landau ,  Sagie Goldenberg

IPC: G06F3/06

CPC classification number: G06F3/0611 ,  G06F3/0659 ,  G06F3/0673

Abstract: A memory system including a memory device of storage transistors organized in multiple memory banks where the memory device interacts with a controller device to perform read and write operations. In some embodiments, the controller device is configured to issue to the memory device a write command and a write termination command, where the write command causing the memory device to initiate a write operation in the memory device and the write termination command causing the memory device to terminate the write operation. In one embodiment, the controller device issues a write abort command as the write termination command to terminate a write operation in progress at a certain memory bank of the memory device in order to issue a read command to read data from the same memory bank. The terminated write operation can resume after the completion of the read operation.