Abstract:
A power supply of the present disclosure includes: a power generator that generates a first driving voltage to be supplied to a timing controller; and a voltage compensator that performs feedback of the first driving voltage and generates a feedback voltage according to a voltage difference between the first driving voltage and a first reference voltage supplied from the power generator. In this structure, the power generator generates a second driving voltage by boosting or dropping the first driving voltage to correspond to the feedback voltage, and may supply the second driving voltage to the timing controller.
Abstract:
A display device may extract an edge of a data signal based on the data signal and phase conversion clock signals, extract a phase of the data signal based on the edge, and generate a clock phase calibration signal based on the phase of the data signal. The display device may calibrate a phase of a clock signal using the clock phase calibration signal that has a phase corresponding to the phase of the clock signal, thereby improving transmission characteristic of the signal.
Abstract:
A liquid crystal display device is provided as follows. A display panel having a first aspect ratio includes pixels, scan lines and data lines. The pixels are arranged at intersections of the scanning lines and the data lines. A display panel driver, in a partial mode in which an image having a second aspect ratio different from the first aspect ratio is displayed on a partial region of the display panel for two or more frame periods, supplies scan signals only to a first number of scan lines electrically connected to pixels of the partial region for a first type frame period of the two or more frame periods, and supplies scan signals to the plurality of scan lines for a second type frame period of the two or more frame periods.
Abstract:
A display device may include first pixels configured to emit light in a first color, second pixels configured to emit light in a second color different from the first color, a data driver configured to supply first reference voltages to data lines coupled to the first pixels, and a sensing circuit configured to receive first sensing voltages from sensing lines coupled to the first pixels, wherein the data driver supplies second reference voltages different from the first reference voltages to data lines coupled to the second pixels, and the sensing circuit receives second sensing voltages from sensing lines coupled to the second pixels.
Abstract:
A display device includes a display panel including scan lines, first signal lines connected to the scan lines in a first pixel block, second signal lines connected to the scan lines in a second pixel block, third signal lines connected to the scan lines in a third pixel block; a first scan driver supplying a first output signal to the first signal lines based on a first sub-clock signal; a second scan driver supplying a second output signal to the second signal lines based on a second sub-clock signal; a third scan driver supplying a third output signal to the third signal lines based on and a third sub-clock signal; and a timing controller. Changes in pulse widths of the first to third output signals are different in one frame period.
Abstract:
A display device includes a display panel including scan lines, first signal lines connected to the scan lines in a first pixel block, second signal lines connected to the scan lines in a second pixel block, third signal lines connected to the scan lines in a third pixel block; a first scan driver supplying a first output signal to the first signal lines based on a first sub-clock signal; a second scan driver supplying a second output signal to the second signal lines based on a second sub-clock signal; a third scan driver supplying a third output signal to the third signal lines based on and a third sub-clock signal; and a timing controller. Changes in pulse widths of the first to third output signals are different in one frame period.
Abstract:
A display device may include first pixels configured to emit light in a first color, second pixels configured to emit light in a second color different from the first color, a data driver configured to supply first reference voltages to data lines coupled to the first pixels, and a sensing circuit configured to receive first sensing voltages from sensing lines coupled to the first pixels, wherein the data driver supplies second reference voltages different from the first reference voltages to data lines coupled to the second pixels, and the sensing circuit receives second sensing voltages from sensing lines coupled to the second pixels.
Abstract:
A display device includes a display panel including scan lines, first signal lines connected to the scan lines in a first pixel block, second signal lines connected to the scan lines in a second pixel block, third signal lines connected to the scan lines in a third pixel block; a first scan driver supplying a first output signal to the first signal lines based on a first sub-clock signal; a second scan driver supplying a second output signal to the second signal lines based on a second sub-clock signal; a third scan driver supplying a third output signal to the third signal lines based on and a third sub-clock signal; and a timing controller. Changes in pulse widths of the first to third output signals are different in one frame period.
Abstract:
A display device may include first pixels configured to emit light in a first color, second pixels configured to emit light in a second color different from the first color, a data driver configured to supply first reference voltages to data lines coupled to the first pixels, and a sensing circuit configured to receive first sensing voltages from sensing lines coupled to the first pixels, wherein the data driver supplies second reference voltages different from the first reference voltages to data lines coupled to the second pixels, and the sensing circuit receives second sensing voltages from sensing lines coupled to the second pixels.
Abstract:
A display device includes a display panel including gate lines, data lines, and pixels; a gate driver that provides gate signals to the pixels through the gate lines; a data driver that provides data signals to the pixels through the data lines; and a timing controller that obtains pre-charging gray scale values based on gray scale values of the pixels. The gate driver simultaneously supplies the gate signals to the gate lines in a first period, and sequentially supplies the gate signals to the gate lines in a second period. The data driver supplies data signals corresponding to the pre-charging gray scale values to the data lines in the first period, and supplies data signals corresponding to the gray scale values of the pixels to the data lines in the second period.