公开(公告)号：US10007631B2

公开(公告)日：2018-06-26

申请号：US15093489

申请日：2016-04-07

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Min Young Park ,  Ki Hyun Pyun

IPC: G06F13/20 ,  G06F13/00 ,  G06F13/40 ,  G06F13/42 ,  G06F12/02

CPC classification number: G06F13/4022 ,  G06F12/0246 ,  G06F13/4282 ,  G06F2212/7206

Abstract: There is provided a display device including an input unit configured to connect an external device to a serial peripheral interface (SPI) through a plurality of connection lines, a switching unit configured to connect the input unit and a flash memory of a driving board to the SPI, a data register configured to output connection setting data for determining a connection state of the switching unit, and a timing controller configured to output a control signal for determining the connection setting data according to an input of a write enable line among the plurality of connection lines.

公开(公告)号：US09449545B2

公开(公告)日：2016-09-20

申请号：US14161521

申请日：2014-01-22

Applicant: Samsung Display Co., Ltd.

Inventor： Ki Hyun Pyun ,  Yun Mi Kim ,  Min Young Park ,  Sung-Jun Kim ,  Ju Hyun Kim ,  Yong Jae Lee ,  Kyung-Hwa Lim

IPC: G09G3/34 ,  G09G3/20 ,  G09G3/36

CPC classification number: G09G3/2074 ,  G09G3/3614 ,  G09G3/3677 ,  G09G2310/0289 ,  G09G2320/0252

Abstract: A method of reducing a time for switching a gate line driving signal of display device having plural gate lines from a level that is less than a full gate-on level to the gate-on level is disclosed. The method may include: during a gate line pre-charging period of a respective gate line, causing the gate line driving signal to be at the full gate-on level; during a corresponding gate line main-charging period that follows the pre-charging period, causing the gate line driving signal of to be at the full gate-on level; and during an interposed period that is interposed between the gate line pre-charging period and its corresponding gate line main-charging period, causing the gate line driving signal to be at an intermediate level that is between the full gate-on level and an opposed gate-off level.

Abstract translation: 公开了一种减少将具有多个栅极线的显示装置的栅极线驱动信号从小于全栅极导通电平的电平切换到栅极导通电平的方法。 该方法可以包括：在相应栅极线的栅极线预充电周期期间，使栅极线驱动信号处于完全栅极导通电平; 在预充电周期之后的相应的栅极线主充电期间，使栅极线驱动信号处于全栅极导通电平; 并且在插入在栅极线预充电周期与其对应的栅极线主充电周期之间的插入时段期间，使栅极线驱动信号处于处于完全栅极导通电平之间的中间电平， 关门水平

公开(公告)号：US11302236B2

公开(公告)日：2022-04-12

申请号：US17235202

申请日：2021-04-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ki Hyun Pyun ,  Min Young Park ,  Eun Jin Choi

IPC: G09G3/20

Abstract: A display device includes: a pixel unit including pixels connected to data lines and scan lines, and signal output lines, where at least one signal output line of the signal output lines is connected to each of the scan lines through a contact point; a data driver disposed at one side of the pixel unit to drive the data lines; a scan driver disposed at the one side of the pixel unit together with the data driver to drive the scan lines; and a timing controller controlling the data driver and the scan driver. The data driver includes: output buffers outputting data signals to the data lines, respectively; and a slew rate controller adjusting a slew rate of the data signals by controlling a bias value supplied to the output buffers in units of pixel rows based on positions of the pixels and a change in the data signals.

公开(公告)号：US10019927B2

公开(公告)日：2018-07-10

申请号：US15000680

申请日：2016-01-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jeong Doo Lee ,  Min Young Park ,  Ki Hyun Pyun

IPC: G09G3/20

CPC classification number: G09G3/2003 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2310/027 ,  G09G2310/0291 ,  G09G2320/0233 ,  G09G2320/0673 ,  G09G2330/02 ,  G09G2330/028

Abstract: A display device and a driving method thereof can reduce or prevent deterioration of image quality caused by ripples of a power voltage. A display device includes a gamma reference voltage generator generating a plurality of gamma reference voltages using a power voltage. A gamma selection signal generator generates a gamma selection signal corresponding to at least one gamma reference voltage among the gamma reference voltages and the power voltage. A gamma data supply unit stores a plurality of gamma data sets and outputs a gamma data set corresponding to the gamma selection signal from among the gamma data sets. A data driver generates a data signal using the gamma data set supplied from the gamma data supply unit and the gamma reference voltages. A display unit includes data lines transmitting the data signal.

公开(公告)号：US09966048B2

公开(公告)日：2018-05-08

申请号：US14660648

申请日：2015-03-17

Applicant: Samsung Display Co., Ltd.

Inventor： Yun Mi Kim ,  Ki Hyun Pyun ,  Sung Jun Kim ,  Min Young Park ,  Jeong Doo Lee ,  Kyung Hwa Lim

IPC: G09G5/395 ,  G11C7/16 ,  G11C16/08 ,  G11C16/10 ,  G09G3/36 ,  G09G5/12 ,  G09G5/393 ,  G11C16/26

CPC classification number: G09G5/395 ,  G09G3/3648 ,  G09G5/12 ,  G09G5/393 ,  G09G2330/021 ,  G09G2360/12 ,  G11C7/16 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  H03M1/66

Abstract: A memory is provided, which comprises an electrically erasable and programmable read only memory (EEPROM) configured to store an operation system and to be rewritable in response to a write operation signal, an address comparator configured to be connected to Inter Integrated Circuit (I2C) lines and output the write operation signal to the EEPROM in response to an external signal, a digital-to-analog converter (DAC) unit configured to determine whether to connect a DAC resistor and the I2C lines in response to the external signal and a pull-up resistor unit configured to be connected to the I2C lines.

公开(公告)号：US11004396B2

公开(公告)日：2021-05-11

申请号：US16368001

申请日：2019-03-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ki Hyun Pyun ,  Min Young Park

IPC: G09G3/3266 ,  G09G3/3275 ,  G06F12/02

Abstract: A timing controller includes: a data transmitter which transmits image data and a frame control signal to a data driver; a scan controller which transmits a scan start signal and a scan clock signal through scan control lines; and a memory interface which receives mode data from a control memory through a memory transmission line during a mode period, where the mode period is a period in which the scan controller does not transmit the scan start signal and the scan clock signal to the scan control lines.

公开(公告)号：US11968289B2

公开(公告)日：2024-04-23

申请号：US18088435

申请日：2022-12-23

Applicant: Samsung Display Co., Ltd.

Inventor： Ki Hyun Pyun ,  Min Young Park ,  Jong Min Shim

IPC: H04L7/033 ,  G09G3/32 ,  H03L7/08 ,  H03L7/089 ,  H03L7/095 ,  H03L7/099 ,  H04L7/04 ,  H03K19/21

CPC classification number: H04L7/033 ,  G09G3/32 ,  H03L7/0807 ,  H03L7/0891 ,  H03L7/095 ,  H03L7/099 ,  H04L7/041 ,  G09G2300/0857 ,  G09G2310/027 ,  G09G2310/08 ,  H03K19/21

Abstract: A clock data recovery circuit includes the following elements: a phase detector for outputting a phase adjustment signal by comparing a clock signal of a first node and an input signal; a charge pump for adjusting a charge amount of a second node according to the phase adjustment signal; a first switch including one end coupled to the second node and including another end coupled to a third node; a second switch including one end which receives a bias voltage and including another end coupled to the third node; a capacitor including a first electrode coupled to the third node; third switches; and voltage control oscillators including control terminals coupled to the third node and including output terminals coupled to the first node through the third switches.

公开(公告)号：US11527202B2

公开(公告)日：2022-12-13

申请号：US16542165

申请日：2019-08-15

Applicant: Samsung Display Co., Ltd.

Inventor： Kyun Ho Kim ,  Jong-Keun Kim ,  Min Young Park ,  Jong Min Shim

IPC: G09G3/32 ,  G09G3/3258

Abstract: A display device according to an exemplary embodiment includes: a display panel including a plurality of pixels; a plurality of source boards connected to the display panel; a power control board connected to the source board and configured to supply a power voltage to the plurality of pixels; and a control board configured to control an output of voltages supplied to the source board according to a control signal transmitted by the power control board.

公开(公告)号：US11424085B2

公开(公告)日：2022-08-23

申请号：US16914636

申请日：2020-06-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jong Min Shim ,  Min Young Park

IPC: H05K1/18 ,  H01H1/20 ,  H05K5/00 ,  H01H1/36

Abstract: According to an exemplary embodiment, a display device comprises: a display panel configured to include a plurality of pixels; a printed circuit board connected to the display panel; a connector mounted in the printed circuit board; and a cable fastened to the connector, wherein the connector comprises: a first connector mounted in the printed circuit board to include a first voltage pad, a second voltage pad, and a plurality of signal pads disposed between the first voltage pad and the second voltage pad; a hinge engaged with the first connector; and a second connector for rotation with respect to a hinge shaft, the second connector includes a third voltage pad and a fourth voltage pad, wherein the cable is inserted between the first connector and the second connector.

公开(公告)号：US11107419B2

公开(公告)日：2021-08-31

申请号：US16889683

申请日：2020-06-01

Applicant: Samsung Display Co., Ltd.

Inventor： Ki Hyun Pyun ,  Jang Hoon Kwak ,  Min Young Park

IPC: G09G3/3283 ,  H03L7/081 ,  H03L7/08

Abstract: A display device may extract an edge of a data signal based on the data signal and phase conversion clock signals, extract a phase of the data signal based on the edge, and generate a clock phase calibration signal based on the phase of the data signal. The display device may calibrate a phase of a clock signal using the clock phase calibration signal that has a phase corresponding to the phase of the clock signal, thereby improving transmission characteristic of the signal.