公开(公告)号：US20150037943A1

公开(公告)日：2015-02-05

申请号：US14081033

申请日：2013-11-15

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Young PARK ,  Dong Il KIM ,  Sang Gab KIM

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/121 ,  G02F2201/123 ,  H01L27/124

Abstract: A method of fabricating a display device includes forming a thin-film transistor including a gate electrode, a source electrode and a drain electrode on a substrate, forming a first insulating layer and a second insulating layer on the thin-film transistor, forming a common electrode on the second insulating layer by depositing a common electrode material on the second insulating layer, plasma-treating a photoresist pattern on the common electrode material, and etching the common electrode material using the plasma-treated photoresist pattern as a mask, defining a contact hole in the second insulating layer which corresponds to the drain electrode using the plasma-treated photoresist pattern and the common electrode as a mask, forming a third insulating layer on the second insulating layer and the common electrode to expose the contact hole and the drain electrode and forming a pixel electrode connected to the drain electrode on the third insulating layer.

Abstract translation: 制造显示装置的方法包括在衬底上形成包括栅电极，源电极和漏电极的薄膜晶体管，在薄膜晶体管上形成第一绝缘层和第二绝缘层，形成共同的 通过在第二绝缘层上沉积公共电极材料，等离子体处理公共电极材料上的光致抗蚀剂图案，以及使用等离子体处理的光致抗蚀剂图案作为掩模蚀刻公共电极材料，限定接触 使用等离子体处理的光致抗蚀剂图案和公共电极作为掩模对应于漏电极的第二绝缘层中的孔，在第二绝缘层和公共电极上形成第三绝缘层，以暴露接触孔和漏电极 以及在所述第三绝缘层上形成连接到所述漏电极的像素电极。

公开(公告)号：US20160380011A1

公开(公告)日：2016-12-29

申请号：US15262943

申请日：2016-09-12

Applicant: Samsung Display Co. Ltd.

Inventor： Ji Young PARK ,  Dong Il KIM ,  Sang Gab KIM

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/121 ,  G02F2201/123 ,  H01L27/124

Abstract: A method of fabricating a display device includes forming a thin-film transistor including a gate electrode, a source electrode and a drain electrode on a substrate, forming a first insulating layer and a second insulating layer on the thin-film transistor, forming a common electrode on the second insulating layer by depositing a common electrode material on the second insulating layer, plasma-treating a photoresist pattern on the common electrode material, and etching the common electrode material using the plasma-treated photoresist pattern as a mask, defining a contact hole in the second insulating layer which corresponds to the drain electrode using the plasma-treated photoresist pattern and the common electrode as a mask, forming a third insulating layer on the second insulating layer and the common electrode to expose the contact hole and the drain electrode and forming a pixel electrode connected to the drain electrode on the third insulating layer.

公开(公告)号：US20210132429A1

公开(公告)日：2021-05-06

申请号：US16996369

申请日：2020-08-18

Applicant: Samsung Display Co., LTD.

Inventor： Woo Suk JANG ,  Young Min CHO ,  Ji Young PARK

IPC: G02F1/1345

Abstract: A display device includes a first substrate, first signal lines, and a first signal pad array. The first signal pads each includes a first pad portion connected to a corresponding first signal line, a second pad portion having a width larger than that of the first pad portion, and a third pad portion connecting the first pad portion with the second pad portion and having a width smaller than the width of the second pad portion. The first signal pads are disposed in a shape symmetrical with respect to an imaginary line. Each first signal pad has an angle between a direction in which the third pad portion is extended and a direction in which the second pad portion is extended. The angle of a first signal pad closer to the imaginary line is smaller than the angle of another first signal pad further away from the imaginary line.

公开(公告)号：US20150044797A1

公开(公告)日：2015-02-12

申请号：US14194015

申请日：2014-02-28

Applicant: Samsung Display Co. Ltd.

Inventor： Ji Young PARK ,  Gwan Ha KIM ,  Dong Il KIM ,  Sang Gab KIM

IPC: H01L27/12

CPC classification number: H01L27/1259 ,  G02F2001/134372

Abstract: A method of manufacturing a thin film transistor array substrate includes providing a plurality of gate lines and a plurality of data lines on a first substrate, providing an organic layer on the gate lines and the data lines, providing a first electrode on the organic layer, providing a passivation layer on the first electrode, providing a second electrode on the passivation layer, providing a first cover layer on the second electrode to cover the second electrode, providing a plurality of photosensitive layer patterns on the first cover layer, providing a plurality of first cutout patterns in the first cover layer and a plurality of second cutout patterns in the second electrode using the photosensitive layer patterns as an etch mask, and providing a plurality of third cutout patterns in the passivation layer using the first cover layer as an etch mask.

Abstract translation: 制造薄膜晶体管阵列基板的方法包括：在第一基板上设置多个栅极线和多个数据线，在栅极线和数据线上提供有机层，在有机层上提供第一电极， 在所述第一电极上提供钝化层，在所述钝化层上提供第二电极，在所述第二电极上提供第一覆盖层以覆盖所述第二电极，在所述第一覆盖层上提供多个感光层图案，提供多个 第一覆盖层中的第一切除图案和使用感光层图案作为蚀刻掩模的第二电极中的多个第二切割图案，并且使用第一覆盖层作为蚀刻掩模在钝化层中提供多个第三切除图案 。