公开(公告)号：US20240312406A1

公开(公告)日：2024-09-19

申请号：US18545798

申请日：2023-12-19

Applicant: Samsung Display Co., LTD.

Inventor： NACKHYEON KEUM ,  KWANGSAE LEE

IPC: G09G3/3233 ,  H10K59/88

CPC classification number: G09G3/3233 ,  H10K59/88 ,  G09G2300/0413

Abstract: A display panel includes: first to N-th active pixels, N being an integer greater than 3; and a dummy pixel arranged adjacent to the N-th active pixel in a same pixel column, the dummy pixel including: a dummy driving transistor including a gate electrode connected to a first node, a first electrode connected to a data line configured to transmit a data voltage, and a second electrode connected to a second node; a plurality of dummy compensation transistors connected in parallel to each other between the first node and the second node; a dummy initialization transistor including a gate electrode configured to receive an initialization gate signal, a first electrode configured to receive an initialization voltage, and a second electrode connected to the first node; and a dummy storage capacitor including a first electrode configured to receive a first supply voltage and a second electrode connected to the first node.

公开(公告)号：US20240428740A1

公开(公告)日：2024-12-26

申请号：US18604499

申请日：2024-03-14

Applicant: Samsung Display Co., Ltd.

Inventor： NACKHYEON KEUM ,  JAE-JIN SONG ,  KWANGSAE LEE

IPC: G09G3/3266 ,  G09G3/3233

Abstract: Disclosed is a scan driving circuit that includes an input transistor, an output transistor, and a discharge control transistor. The input transistor is connected between an input terminal, that receives a start signal, and a first node. The input transistor includes a gate electrode connected to a clock terminal. The output transistor is connected between an output terminal, that outputs a scan signal, and a first voltage terminal. The output transistor includes a gate electrode connected to the first node. The discharge control transistor is connected between the first node and a second voltage terminal, and includes a gate electrode connected to the second voltage terminal. Each frame of a second plurality of frames of the start signal includes an address period and a self-scan period. In the address period, a discharge voltage provided to the second voltage terminal is a high voltage. In the self-scan period, a voltage level of the discharge voltage is lower than a voltage level of the high voltage.

公开(公告)号：US20230320186A1

公开(公告)日：2023-10-05

申请号：US18097717

申请日：2023-01-17

Applicant: Samsung Display Co., Ltd.

Inventor： JAE-JIN SONG ,  KWANGSAE LEE

IPC: H10K71/70 ,  G09G3/3233 ,  H10K59/12

CPC classification number: H10K71/70 ,  G09G3/3233 ,  H10K59/1201 ,  G09G2300/0842 ,  G09G2300/0819 ,  G09G2310/08

Abstract: A method of inspecting a display panel includes testing a pixel circuit including a plurality of transistors and a capacitor in the display panel. The testing of the pixel circuit includes: providing a first test voltage to a first node to which a first electrode of the capacitor is connected, providing a second test voltage different from the first test voltage to a second node to which a second electrode of the capacitor is connected, and detecting a defect in the pixel circuit through a test transistor connected to the first node among the plurality of transistors.

公开(公告)号：US20240185750A1

公开(公告)日：2024-06-06

申请号：US18228244

申请日：2023-07-31

Applicant: Samsung Display Co., LTD.

Inventor： HAE-YEON LEE ,  SUKYOUNG KIM ,  HWAYOUNG SONG ,  KWANGSAE LEE ,  IL-JOO KIM

IPC: G09G3/00 ,  G06F3/041 ,  G06F3/044 ,  H10K59/131 ,  H10K59/40

CPC classification number: G09G3/006 ,  G06F3/0412 ,  G06F3/0443 ,  G09G3/035 ,  H10K59/131 ,  H10K59/40 ,  H10K2102/311

Abstract: A display device includes: a substrate including a display area, a peripheral area surrounding the display area, a hole area positioned inside the display area, and a pad area; a crack detection line including a first part in the pad area and extending to the peripheral area and a second part connected to the first part, disposed to surround the hole area, and extending to the pad area; a printed circuit board in the pad area; first transistors in the pad area and connected in series between the printed circuit board and the first part, where each of gate electrodes of the first transistors is connected to a first signal line; and second transistors in the pad area and connected in series between a constant voltage line and the first part, where each of gate electrodes of the second transistors is connected to a second signal line.

公开(公告)号：US20210286002A1

公开(公告)日：2021-09-16

申请号：US17191581

申请日：2021-03-03

Applicant: Samsung Display Co., Ltd.

Inventor： HWAYOUNG SONG ,  SEUNGWOO SUNG ,  DONG EUP LEE ,  SEUNGJI CHA ,  KIMYEONG EOM ,  KWANGSAE LEE

IPC: G01R31/317 ,  G09G3/20

Abstract: A display panel test circuit includes a first transistor connected to a first data line and receiving a red lighting test signal, a second transistor connected to the first data line and receiving a blue lighting test signal, a third transistor connected to a second data line and receiving a first green lighting test signal, a fourth transistor connected to a third data line and receiving the red lighting test signal, a fifth transistor connected to the third data line and receiving the blue lighting test signal, a sixth transistor connected to a fourth data line and receiving a second green lighting test signal, a seventh transistor connected to the second data line and receiving a crack test signal, and an eighth transistor connected to the fourth data line and receiving the crack test signal. The display panel test circuit performs one or more tests on a display panel.