公开(公告)号：US20230316989A1

公开(公告)日：2023-10-05

申请号：US18094684

申请日：2023-01-09

Applicant: Samsung Display Co., LTD.

Inventor： SUNGMIN SON ,  JAE-JIN SONG

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/0216 ,  G09G2310/0278 ,  G09G2320/0247 ,  G09G2320/0233

Abstract: A pixel circuit includes a light emitting element, a first transistor, a second transistor, and a third transistor. The first transistor applies a driving current to the light emitting element. The second transistor and the third transistor apply an initialization voltage to a first electrode of the light emitting element. The second transistor and the third transistor are electrically connected to each other in series.

公开(公告)号：US20230061839A1

公开(公告)日：2023-03-02

申请号：US17831442

申请日：2022-06-03

Applicant: Samsung Display Co., LTD.

Inventor： HAI-JUNG IN ,  SUNGMIN SON ,  JAE-JIN SONG

IPC: G09G3/20

Abstract: A repair pixel and a display apparatus including the repair pixel, the display panel including a repair pixel for a pixel row or a plurality of repair pixels for a pixel row so that repair may be performed using the repair pixel when a bad pixel occurs in the corresponding pixel row. The bad pixel is repaired using the repair pixel so that the yield of the display panel may be enhanced.

公开(公告)号：US20240127742A1

公开(公告)日：2024-04-18

申请号：US18342833

申请日：2023-06-28

Applicant: Samsung Display Co., LTD.

Inventor： SUNGMIN SON ,  JAE-JIN SONG ,  Jungwoo LEE

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/0267 ,  G09G2310/0275

Abstract: An inverter circuit in a scan driving circuit of a display device that includes an output transistor connected between a first voltage line and an output terminal outputting a second start signal and including a gate electrode connected to an input terminal receiving a first start signal, a first switching transistor connected between the first voltage line and the output terminal and including a gate electrode connected to a first switching line receiving a first switching signal, a second switching transistor connected between the output terminal and a first node and including a gate electrode connected to a second switching line receiving a second switching signal, and a discharge circuit that discharges the first node to a first bias clock signal in response to the first start signal, the first bias clock signal, and a second bias clock signal.

公开(公告)号：US20240062702A1

公开(公告)日：2024-02-22

申请号：US18125135

申请日：2023-03-23

Applicant: Samsung Display Co., Ltd.

Inventor： SUNGMIN SON ,  JAE-JIN SONG ,  KIMYEONG EOM ,  Jungwoo Lee

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/0267 ,  G09G2300/0842 ,  G09G2310/0275 ,  G09G2310/08 ,  G09G2300/0426

Abstract: Provided is a gate driver comprising an inverter inverting a start signal to generate an inverted start signal, a first driver including a first stage generating a bias gate signal to initialize a light emitting element of each of pixels in response to the inverted start signal, and a second driver including a second stage generating a write gate signal to apply data voltages to the pixels in response to the start signal. Accordingly, the gate driver may generate a plurality of gate signals using one start signal. In addition, since the gate driver generates a write gate signal and a bias gate signal using one start signal, a bias operation and a light emitting element initialization operation may be performed in a self-scan period without adding the start signal. Further, a size of the gate driver may be reduced, and accordingly, the gate driver may be efficiently disposed.

公开(公告)号：US20240428740A1

公开(公告)日：2024-12-26

申请号：US18604499

申请日：2024-03-14

Applicant: Samsung Display Co., Ltd.

Inventor： NACKHYEON KEUM ,  JAE-JIN SONG ,  KWANGSAE LEE

IPC: G09G3/3266 ,  G09G3/3233

Abstract: Disclosed is a scan driving circuit that includes an input transistor, an output transistor, and a discharge control transistor. The input transistor is connected between an input terminal, that receives a start signal, and a first node. The input transistor includes a gate electrode connected to a clock terminal. The output transistor is connected between an output terminal, that outputs a scan signal, and a first voltage terminal. The output transistor includes a gate electrode connected to the first node. The discharge control transistor is connected between the first node and a second voltage terminal, and includes a gate electrode connected to the second voltage terminal. Each frame of a second plurality of frames of the start signal includes an address period and a self-scan period. In the address period, a discharge voltage provided to the second voltage terminal is a high voltage. In the self-scan period, a voltage level of the discharge voltage is lower than a voltage level of the high voltage.

公开(公告)号：US20230320186A1

公开(公告)日：2023-10-05

申请号：US18097717

申请日：2023-01-17

Applicant: Samsung Display Co., Ltd.

Inventor： JAE-JIN SONG ,  KWANGSAE LEE

IPC: H10K71/70 ,  G09G3/3233 ,  H10K59/12

CPC classification number: H10K71/70 ,  G09G3/3233 ,  H10K59/1201 ,  G09G2300/0842 ,  G09G2300/0819 ,  G09G2310/08

Abstract: A method of inspecting a display panel includes testing a pixel circuit including a plurality of transistors and a capacitor in the display panel. The testing of the pixel circuit includes: providing a first test voltage to a first node to which a first electrode of the capacitor is connected, providing a second test voltage different from the first test voltage to a second node to which a second electrode of the capacitor is connected, and detecting a defect in the pixel circuit through a test transistor connected to the first node among the plurality of transistors.