公开(公告)号：US20240428740A1

公开(公告)日：2024-12-26

申请号：US18604499

申请日：2024-03-14

Applicant: Samsung Display Co., Ltd.

Inventor： NACKHYEON KEUM ,  JAE-JIN SONG ,  KWANGSAE LEE

IPC: G09G3/3266 ,  G09G3/3233

Abstract: Disclosed is a scan driving circuit that includes an input transistor, an output transistor, and a discharge control transistor. The input transistor is connected between an input terminal, that receives a start signal, and a first node. The input transistor includes a gate electrode connected to a clock terminal. The output transistor is connected between an output terminal, that outputs a scan signal, and a first voltage terminal. The output transistor includes a gate electrode connected to the first node. The discharge control transistor is connected between the first node and a second voltage terminal, and includes a gate electrode connected to the second voltage terminal. Each frame of a second plurality of frames of the start signal includes an address period and a self-scan period. In the address period, a discharge voltage provided to the second voltage terminal is a high voltage. In the self-scan period, a voltage level of the discharge voltage is lower than a voltage level of the high voltage.

公开(公告)号：US20250069556A1

公开(公告)日：2025-02-27

申请号：US18792555

申请日：2024-08-02

Applicant: Samsung Display Co., Ltd.

Inventor： NACKHYEON KEUM ,  KYUNG-HOON KIM ,  MINJOO KIM ,  JEONGHUN BANG ,  DONGHWAN JEON

IPC: G09G3/3266 ,  G09G3/3233

Abstract: Each stage of a scan driver includes a first control transistor connected between a first input terminal and a first node to operate in response to a clock signal, a second control transistor connected between a second input terminal and a second node to operate in response to the clock signal, a third control transistor connected between the first node and a first control node to operate in response to a first voltage provided through a first voltage terminal, a fourth control transistor connected between a second voltage terminal and a second control node to operate in response to potential at the first node, a fifth control transistor connected between the second control node and the first voltage terminal to operate in response to a potential at the second node, and a first capacitor connected between the second node and the second control node.

公开(公告)号：US20240312418A1

公开(公告)日：2024-09-19

申请号：US18675067

申请日：2024-05-27

Applicant: Samsung Display Co., Ltd.

Inventor： JI-HYUN KA ,  NACKHYEON KEUM ,  KIMYEONG EOM

IPC: G09G3/3258 ,  G09G3/3266 ,  G09G3/3291

CPC classification number: G09G3/3258 ,  G09G3/3291 ,  G09G3/3266 ,  G09G2300/0876

Abstract: A display panel of an OLED display device includes a first pixel configured to emit first color light, a second pixel configured to emit second color light, and a third pixel configured to emit third color light. Each of the first, second and third pixels includes at least two transistors, at least one capacitor and an organic light emitting diode. At least one of at least two transistors or at least one capacitor included in the third pixel has a size different from a size of a corresponding one at least two transistors or at least one capacitor included in the first pixel or the second pixel.

公开(公告)号：US20240312406A1

公开(公告)日：2024-09-19

申请号：US18545798

申请日：2023-12-19

Applicant: Samsung Display Co., LTD.

Inventor： NACKHYEON KEUM ,  KWANGSAE LEE

IPC: G09G3/3233 ,  H10K59/88

CPC classification number: G09G3/3233 ,  H10K59/88 ,  G09G2300/0413

Abstract: A display panel includes: first to N-th active pixels, N being an integer greater than 3; and a dummy pixel arranged adjacent to the N-th active pixel in a same pixel column, the dummy pixel including: a dummy driving transistor including a gate electrode connected to a first node, a first electrode connected to a data line configured to transmit a data voltage, and a second electrode connected to a second node; a plurality of dummy compensation transistors connected in parallel to each other between the first node and the second node; a dummy initialization transistor including a gate electrode configured to receive an initialization gate signal, a first electrode configured to receive an initialization voltage, and a second electrode connected to the first node; and a dummy storage capacitor including a first electrode configured to receive a first supply voltage and a second electrode connected to the first node.

公开(公告)号：US20230186856A1

公开(公告)日：2023-06-15

申请号：US18106431

申请日：2023-02-06

Applicant: Samsung Display Co., Ltd.

Inventor： JI-HYUN KA ,  NACKHYEON KEUM ,  KIMYEONG EOM

IPC: G09G3/3258 ,  G09G3/3291

CPC classification number: G09G3/3258 ,  G09G3/3291 ,  G09G3/3266

Abstract: A display panel of an OLED display device includes a first pixel configured to emit first color light, a second pixel configured to emit second color light, and a third pixel configured to emit third color light. Each of the first, second and third pixels includes at least two transistors, at least one capacitor and an organic light emitting diode. At least one of at least two transistors or at least one capacitor included in the third pixel has a size different from a size of a corresponding one at least two transistors or at least one capacitor included in the first pixel or the second pixel.