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公开(公告)号：US10777159B2
公开(公告)日：2020-09-15
申请号：US15805754
申请日：2017-11-07
Applicant: Samsung Display Co., Ltd.
Inventor： Noboru Takeuchi , Masami Igawa , Min soo Kang , Beomjun Kim , YoonHo Kim , Seongyeol Syn , Hong-Woo Lee
Abstract: Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.
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公开(公告)号：US10269321B2
公开(公告)日：2019-04-23
申请号：US15470968
申请日：2017-03-28
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Jihee Yoon , Kang-woo Kim , Beomjun Kim , Jonghwan Lee , Hong-woo Lee
Abstract: A display device includes a display panel having a plurality of pixels respectively connected to a plurality of gate lines and a plurality of data lines, a gate driving circuit that outputs a plurality of gate signals to the plurality of gate lines, and a data driving circuit configured that outputs a plurality of data signals for driving the plurality of data lines. Each of the plurality of pixels includes a first sub-pixel configured to receive a corresponding data signal among the plurality of data signals in response to a first gate signal among the plurality of gate signals, and a second sub-pixel configured to receive a corresponding data signal among the plurality of data signals in response to the first gate signal, and reduce a voltage of the received data signal in response to a second gate signal among the plurality of gate signals. The second gate signal is a signal delayed by a 2×d×H time relative to the first gate signal (where each of d and H is a positive integer, H is a horizontal period, and d×H is a pulse width of first and second gate signals).
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公开(公告)号：US20190206356A1
公开(公告)日：2019-07-04
申请号：US16230582
申请日：2018-12-21
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： KANG-WOO KIM , Beomjun Kim , Changjung Kim , Seongyeol Syn , Gwon-Heon Ryu
IPC: G09G3/36
Abstract: A display apparatus includes a display panel, a timing controller, a data driver and a voltage generator. The display panel includes a switching element, a pixel electrode connected to the switching element, a common electrode, a storage electrode and a pixel electrode. The timing controller processes input image data according to a variable frame rate and generates a data signal having a variable frame length. The data driver converts the data signal into a data voltage and outputs the data voltage to the pixel electrode. The voltage generator may apply a common voltage to the common electrode and a storage voltage greater than the common voltage to the storage electrode, and/or apply the common voltage varied according to a grayscale value of the input image data. Embodiments may reduce or obviate a display defect caused by luminance differences between frames displayed at different frame rates.
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公开(公告)号：US20160018707A1
公开(公告)日：2016-01-21
申请号：US14730922
申请日：2015-06-04
Applicant: Samsung Display Co., Ltd.
Inventor： Min Soo KANG , Beomjun Kim
IPC: G02F1/1362 , G02F1/1333 , G02F1/1368
CPC classification number: G02F1/1339 , G02F1/133512 , G02F1/136204 , G02F2001/133334
Abstract: A display device includes an array substrate, an opposite substrate, a printed circuit board, and a conductive member. The array substrate includes pixel electrodes. The opposite substrate faces the array substrate, is coupled with array substrate, and includes a light blocking layer disposed in a non-pixel area of the array substrate. The printed circuit board includes a ground terminal and output terminals to apply a driving signal to the array substrate through the output terminals. The conductive member electrically connects the light blocking layer to the ground terminal.
Abstract translation: 显示装置包括阵列基板，相对基板，印刷电路板和导电部件。 阵列基板包括像素电极。 面对阵列基板的相对基板与阵列基板耦合，并且包括设置在阵列基板的非像素区域中的遮光层。 印刷电路板包括接地端子和输出端子，用于通过输出端子向阵列基板施加驱动信号。 导电部件将遮光层电连接到接地端子。
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公开(公告)号：US10777162B2
公开(公告)日：2020-09-15
申请号：US16230582
申请日：2018-12-21
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Kang-Woo Kim , Beomjun Kim , Changjung Kim , Seongyeol Syn , Gwon-Heon Ryu
Abstract: A display apparatus includes a display panel, a timing controller, a data driver and a voltage generator. The display panel includes a switching element, a pixel electrode connected to the switching element, a common electrode, a storage electrode and a pixel electrode. The timing controller processes input image data according to a variable frame rate and generates a data signal having a variable frame length. The data driver converts the data signal into a data voltage and outputs the data voltage to the pixel electrode. The voltage generator may apply a common voltage to the common electrode and a storage voltage greater than the common voltage to the storage electrode, and/or apply the common voltage varied according to a grayscale value of the input image data. Embodiments may reduce or obviate a display defect caused by luminance differences between frames displayed at different frame rates.
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Patent Agency Ranking
公开(公告)号：US09978327B2
公开(公告)日：2018-05-22
申请号：US14973766
申请日：2015-12-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Duc-Han Cho , Beomjun Kim , Yoonho Kim , Noboru Takeuchi , Kangnam Kim
CPC classification number: G09G3/3677 , G09G3/3614 , G11C19/184 , G11C19/28
Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.
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7.发明申请公开(公告)号：US20160210928A1
公开(公告)日：2016-07-21
申请号：US14973766
申请日：2015-12-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Duc-Han Cho , Beomjun Kim , Yoonho Kim , Noboru Takeuchi , Kangnam Kim
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3614 , G11C19/184 , G11C19/28
Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.
Abstract translation: 门驱动电路包括驱动级。 每个驱动级将每个栅极信号施加到显示面板的每个栅极线。 第k（k是等于或大于2的自然数）驱动级包括第一输出晶体管，电容器以及第一和第二控制晶体管。 第一输出晶体管包括连接到第一节点的控制电极，接收时钟信号的输入电极和输出第k个门信号的输出电极。 电容器连接在第一输出晶体管的输出电极和第一输出晶体管的控制电极之间。 第一控制晶体管将第一控制信号施加到第二节点，以在输出第k个门信号之前控制第一节点的电压。 第二控制晶体管二极管连接在第二节点和第一节点之间。
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公开(公告)号：US10347208B2
公开(公告)日：2019-07-09
申请号：US15445025
申请日：2017-02-28
Applicant: Samsung Display Co., Ltd.
Inventor： Noboru Takeuchi , Jonghwan Lee , Kangnam Kim , Beomjun Kim , Hongwoo Lee , Youmee Hyun
IPC: G09G3/36 , G02F1/1362 , G02F1/1368 , G02F1/1343 , G02F1/1335
Abstract: A display device with space for accommodating elements of a gate driver in a display area of the display device, the display device including first and second adjacent pixel electrodes, and third and fourth adjacent pixel electrodes; a gate line extending between the first pixel electrode and the second pixel electrode and between the third pixel electrode and the fourth pixel electrode; a gate driver having a plurality of elements and configured to drive the gate line; and a light blocking layer overlapping the gate line, wherein the light blocking layer comprises a first light blocking portion and a second light blocking portion, the first light blocking portion is adjacent to the first pixel electrode and the second pixel electrode, the second light blocking portion is adjacent to the third pixel electrode and the fourth pixel electrode, the second light blocking portion having a larger size than a size of the first light blocking portion, and at least one of the plurality of elements of the gate driver overlaps the second light blocking portion.
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公开(公告)号：US10109252B2
公开(公告)日：2018-10-23
申请号：US15964249
申请日：2018-04-27
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Duc-han Cho , Beomjun Kim , Yoonho Kim , Noboru Takeuchi , Kangnam Kim
Abstract: A gate driving circuit includes driving stages. Each of the driving stages applies each of gate signals to each of gate lines of a display panel. A k-th (k is a natural number equal to or greater than 2) driving stage includes a first output transistor, a capacitor, and first and second control transistor. The first output transistor includes a control electrode connected to a first node, an input electrode receiving a clock signal, and an output electrode outputting a k-th gate signal. The capacitor is connected between the output electrode of the first output transistor and the control electrode of the first output transistor. The first control transistor applies a first control signal to a second node to control a voltage of the first node before the k-th gate signal is output. The second control transistor is diode-connected between the second node and the first node.
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公开(公告)号：US10101624B2
公开(公告)日：2018-10-16
申请号：US15805957
申请日：2017-11-07
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Seongyeol Syn , Jihee Yoon , Yonghee Lee , Beomjun Kim , Jonghwan Lee
IPC: G02F1/1362 , G02F1/1343 , G02F1/136
Abstract: A display device includes a gate line; first and second adjacent data lines intersecting the gate line; a first sub-pixel electrode between the first and second data lines; a second sub-pixel electrode between the first gate line and the first sub-pixel electrode; a first switching element connected to the first gate line, the first data line and the first sub-pixel electrode; a second switching element connected to the first gate line, the first data line and the second sub-pixel electrode; a connection electrode connecting the first sub-pixel electrode and the first switching element; a first dummy electrode between the first data line and the second sub-pixel electrode; and a second dummy electrode extending from the connection electrode and is disposed closer to the first data line than the second data line. End portions of the first and second dummy electrodes face each other.
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