Display apparatus
    1.
    发明授权

    公开(公告)号:US11430402B2

    公开(公告)日:2022-08-30

    申请号:US16511184

    申请日:2019-07-15

    IPC分类号: G09G3/38 G09G5/18 G09G3/36

    摘要: A display apparatus includes a display panel comprising a pixel which is connected to a gate line and a data line, a gate driver configured to generate a gate signal having a gate-on voltage and a gate-off voltage and to provide the gate line with the gate signal, and a gate controller configured to generate a clock signal having a duty ratio and to provide the gate driver with the clock signal, where a mean amplitude of the clock signal in a vertical blanking period of a frame cycle is smaller than the mean amplitude of the clock signal in an active period of the frame cycle.

    Display device and method of driving the same

    公开(公告)号:US11295697B2

    公开(公告)日:2022-04-05

    申请号:US17092650

    申请日:2020-11-09

    IPC分类号: G09G5/00 G09G3/20 H04N7/01

    摘要: A display device includes a display panel which includes pixels arranged in a matrix form and a controller which receives a first image signal corresponding to a first active period of a first frame, outputs a first final output signal corresponding to a first conversion active period of the first frame, and drives the display panel based on the first final image signal. The controller includes a timing changing unit which receives the first image signal and changes a first image signal pixel size corresponding to the first image signal to a panel pixel size corresponding to the display panel to generate the first output signal, and a frequency changing unit which receives the first output signal from the timing changing unit and reduces a frame frequency of the first output signal based on the first image signal to output the first final output signal.

    DISPLAY APPARATUS
    4.
    发明申请
    DISPLAY APPARATUS 审中-公开

    公开(公告)号:US20190340990A1

    公开(公告)日:2019-11-07

    申请号:US16511184

    申请日:2019-07-15

    IPC分类号: G09G3/36 G09G5/18

    摘要: A display apparatus includes a display panel comprising a pixel which is connected to a gate line and a data line, a gate driver configured to generate a gate signal having a gate-on voltage and a gate-off voltage and to provide the gate line with the gate signal, and a gate controller configured to generate a clock signal having a duty ratio and to provide the gate driver with the clock signal, where a mean amplitude of the clock signal in a vertical blanking period of a frame cycle is smaller than the mean amplitude of the clock signal in an active period of the frame cycle.

    AWARENESS GLASSES, CAR MIRROR UNIT, AND DISPLAY APPARATUS
    6.
    发明申请
    AWARENESS GLASSES, CAR MIRROR UNIT, AND DISPLAY APPARATUS 审中-公开
    有意义的玻璃,汽车镜子和显示装置

    公开(公告)号:US20150182759A1

    公开(公告)日:2015-07-02

    申请号:US14516422

    申请日:2014-10-16

    摘要: A pair of awareness glasses includes a frame, a light source, a driving unit, light guide lenses, and diffraction grating patterns. The light source unit is disposed in the frame. The light source unit is configured to generate light in response to input power. The driving unit is configured to supply the input power. The light guide lenses are configured to guide the light to the eyes of a user. The diffraction grating patterns are formed on surfaces of the light guide lenses. The diffraction grating patterns are configured to diffract and reflect the light to the eyes of the user. The light output from each of the diffraction grating patterns has a peak wavelength between 444 nm and 484 nm.

    摘要翻译: 一对意识眼镜包括框架,光源,驱动单元,导光透镜和衍射光栅图案。 光源单元设置在框架中。 光源单元被配置为响应于输入功率而产生光。 驱动单元被配置为提供输入功率。 导光透镜被配置为将光引导到用户的眼睛。 衍射光栅图案形成在导光透镜的表面上。 衍射光栅图案被配置为将光衍射并反射到用户的眼睛。 来自每个衍射光栅图案的光输出具有444nm和484nm之间的峰值波长。

    Display apparatus with clock signal modification during vertical blanking period

    公开(公告)号:US11295688B2

    公开(公告)日:2022-04-05

    申请号:US16903746

    申请日:2020-06-17

    IPC分类号: G09G3/36 G09G5/18

    摘要: A display apparatus includes a display panel comprising a pixel which is connected to a gate line and a data line, a gate driver configured to generate a gate signal having a gate-on voltage and a gate-off voltage and to provide the gate line with the gate signal, and a gate controller configured to generate a clock signal having a duty ratio and to provide the gate driver with the clock signal, where a mean amplitude of the clock signal in a vertical blanking period of a frame cycle is smaller than the mean amplitude of the clock signal in an active period of the frame cycle.

    Display device and method of driving the same

    公开(公告)号:US10832631B2

    公开(公告)日:2020-11-10

    申请号:US16426531

    申请日:2019-05-30

    IPC分类号: G09G5/00 G09G3/20 H04N7/01

    摘要: A display device includes a display panel which includes pixels arranged in a matrix form and a controller which receives a first image signal corresponding to a first active period of a first frame, outputs a first final output signal corresponding to a first conversion active period of the first frame, and drives the display panel based on the first final image signal. The controller includes a timing changing unit which receives the first image signal and changes a first image signal pixel size corresponding to the first image signal to a panel pixel size corresponding to the display panel to generate the first output signal, and a frequency changing unit which receives the first output signal from the timing changing unit and reduces a frame frequency of the first output signal based on the first image signal to output the first final output signal.

    Gate driving circuit and display device having the same

    公开(公告)号:US10685618B2

    公开(公告)日:2020-06-16

    申请号:US15829007

    申请日:2017-12-01

    IPC分类号: G09G3/36 G09G3/3291 G09G5/00

    摘要: A display device includes a display panel which includes a plurality of gate lines and a plurality of pixels, where each of the pixels is connected to a corresponding gate line among the gate lines, and a gate driving circuit which includes a stage that applies a gate signal to at least one of the gate lines. The gate signal includes a high period in which the gate signal has a high voltage and a low period in which the gate signal has a low voltage having a level less than a level of the high voltage, and the low period includes a falling period in which the low voltage falls to a second level from a first level which is greater than the second level.

    Display device with clock signal modification during vertical blanking period

    公开(公告)号:US10395616B2

    公开(公告)日:2019-08-27

    申请号:US15443566

    申请日:2017-02-27

    IPC分类号: G09G3/36 G09G5/18

    摘要: A display apparatus includes a display panel comprising a pixel which is connected to a gate line and a data line, a gate driver configured to generate a gate signal having a gate-on voltage and a gate-off voltage and to provide the gate line with the gate signal, and a gate controller configured to generate a clock signal having a duty ratio and to provide the gate driver with the clock signal, where a mean amplitude of the clock signal in a vertical blanking period of a frame cycle is smaller than the mean amplitude of the clock signal in an active period of the frame cycle.