Abstract:
A display panel includes a base layer, a circuit element layer, and a light-emitting element layer. The circuit element layer includes a power electrode, and an auxiliary electrode disposed on a side surface of the power electrode. The light-emitting element layer includes a pixel defining film that defines a pixel opening, a conductive partition wall disposed on the pixel defining film, a lower electrode disposed in the pixel opening, a light-emitting pattern disposed on the lower electrode, and an upper electrode disposed on the light-emitting pattern. The conductive partition wall includes a first conductive layer disposed on the pixel defining film, and a second conductive layer, and a side surface of the second conductive layer more protrudes than a side surface of the first conductive layer. The upper electrode is electrically connected to the power electrode via the auxiliary electrode.
Abstract:
An organic light-emitting diode (OLED) display apparatus is provided. The OLED display apparatus includes a substrate, an initialization voltage line, a first thin film transistor (TFT) including an active layer. The initialization voltage line transmits an initialization voltage. The first thin film transistor (TFT) includes an active layer, a gate electrode, and an auxiliary gate electrode. The active layer is disposed on the substrate and includes a source region, a channel region, and a drain region. The gate electrode is disposed on the channel region. The auxiliary gate electrode is disposed on the gate electrode on a boundary between the channel region and the drain region. The voltage application electrode is disposed on the auxiliary gate electrode and is connected to the initialization voltage line and the auxiliary gate electrode.
Abstract:
A display device includes: a substrate including a display area, a first non-display area, a second non-display area, and a bending area and extending in a second direction, a first inorganic film disposed in the display area, the first non-display area, the second non-display area and a portion of the bending area on the substrate, a second inorganic film disposed on the first inorganic film and overlapping the display area, the first non-display area, and the second non-display area in a plan view, a first power line disposed on the second inorganic film and overlapping the first non-display area in a plan view, and a first dummy line extending from the first power line, disposed on the first inorganic film in the bending area, covering a first side surface of the second inorganic film in the first non-display area, and extending in the second direction.
Abstract:
A display device may include an active layer disposed on a substrate, a first conductive layer disposed on the active layer and including a gate electrode, a second conductive layer disposed on the first conductive layer, a third conductive layer disposed on the second conductive layer and including a connection electrode connecting the active layer and the gate electrode, a fourth conductive layer disposed on the third conductive layer and including a first driving voltage line extending in a first direction, and a fifth conductive layer disposed on the fourth conductive layer and including a first connection line extending in a second direction intersecting the first direction. The first driving voltage line may include an extension portion which extends in the second direction and disposed between the second connection line and the connection electrode to overlap at least one of the second connection line and the connection electrode.
Abstract:
A display device includes a first pixel, a second pixel, and a third pixel. The first pixel includes a first light emitting element of a first group including a first pixel electrode disposed in a first area, a second light emitting element of the first group including a second pixel electrode electrically connected to the first pixel electrode and disposed in the first area, and a first pixel circuit electrically connected to the first light emitting element of the first group and the second light emitting element of the first group and disposed in the second area.
Abstract:
A display panel includes a plurality of first pixels on a first region, a plurality of second pixels on a second region, and a test circuit. The second region has a transmittance less than a transmittance of the first region. The test circuit provides one or more test voltages to the first pixels and the second pixels. The test circuit includes a first test circuit and a second test circuit. The first test circuit provides the first pixels with a first voltage, and the second test circuit provides the second pixels with a second voltage different from the first voltage.
Abstract:
A display panel includes a base layer, a pixel defining film on the base layer and including an inorganic material, a bank layer on the pixel defining film and having a plurality of pixel openings, a plurality of light-emitting elements respectively located in the plurality of pixel openings, each of the plurality of light-emitting elements including an anode, a light-emitting pattern, and a cathode, the cathode being in contact with the bank layer, and a lower encapsulation pattern on the bank layer and including a portion on the bank layer. The lower encapsulation pattern includes a first lower encapsulation pattern on the cathode and the bank layer, the first lower encapsulation pattern including a first material, and a second lower encapsulation pattern on the first lower encapsulation pattern, the second lower encapsulation pattern including a second material different from the first material, and a tip portion.
Abstract:
An electronic device includes a display panel that includes a first region and a second region adjacent to the first region. The display panel includes a first light emitting unit that is disposed in the first region and that includes (1-1)th light emitting elements, (1-2)th light emitting elements, and (1-3)th light emitting elements and a second light emitting unit that is disposed in the first region and that includes (2-1)th light emitting elements, (2-2)th light emitting elements, and (2-3)th light emitting elements. The (1-1)th light emitting elements and the (2-1)th light emitting elements have the same arrangement pattern, the (1-3)th light emitting elements and the (2-3)th light emitting elements have the same arrangement pattern, and the (1-2)th light emitting elements and the (2-2)th light emitting elements have different arrangement patterns.
Abstract:
A display device includes an electronic module and a display panel including a first display area that overlaps the electronic module and a second display area that does not overlap the electronic module. The display panel includes a base layer, a light emitting element layer disposed on the base layer, and a light blocking layer disposed between the base layer and the light emitting element layer. The light emitting element layer includes a plurality of first light emitting elements disposed in the first display area and a plurality of second light emitting elements disposed in the second display area. The light blocking layer includes a plurality of first light blocking patterns disposed in the first display area and respectively overlapping the first light emitting elements.
Abstract:
A display device that includes: a display panel including a plurality of pixels respectively connected to a corresponding data line of a plurality of data lines and a corresponding scan line of a plurality of scan lines; and a test circuit connected to the data lines, and wherein the display panel includes a first area having a first light transmittance and a second area having a second light transmittance, wherein the pixels include a first pixel in the first area and a second pixel in the second area, wherein the test circuit provides a first test data signal to a data line connected to the first pixel, and provides a second test data signal to a data line connected to the second pixel, and wherein a voltage level of the first test data signal is different from a voltage level of the second test data signal.