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公开(公告)号:US10152942B2
公开(公告)日:2018-12-11
申请号:US15394994
申请日:2016-12-30
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sang Yong No , Kwihyun Kim , Youngsoo Sohn
IPC: G09G3/36 , G09G3/3225
Abstract: A display apparatus includes a timing controller, a data driver and a display panel. The data driver generates a positive polarity data voltage and a negative polarity data voltage based on image data compensated by the timing controller. The display panel includes a first pixel driven based on the positive polarity voltage and a second pixel driven based on the negative polarity voltage. The display panel receives a storage voltage applied to the first pixel and the second pixel. The timing controller compensates the image data when a variation on a level of the storage voltage occurs. The compensation shifts a level of the first data voltage from a first normal level to a first compensation level in a direction, and shifts a level of the second data voltage from a second normal level to a second compensation level in the same direction.
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公开(公告)号:US12112704B2
公开(公告)日:2024-10-08
申请号:US18501031
申请日:2023-11-03
Applicant: Samsung Display Co., Ltd.
Inventor: Yeonkyung Kim , Kwihyun Kim , Dongwoo Kim
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08 , G09G2320/045 , G09G2330/021
Abstract: A pixel circuit is disclosed that includes first through sixth transistors, first and second capacitors, and a light emitting element. A gate electrode of the second transistor receives a first gate signal. A gate electrode of the third transistor receive a second gate signal. Gate electrodes of each of the fourth and fifth transistors receive a third gate signal. A gate electrode of the sixth transistor receives an emission signal. First electrodes of the first transistor and the first capacitor each receive a first power supply voltage. A cathode electrode of the light emitting element receives a second power supply voltage. A first electrode of the fourth transistor receives an initialization voltage.
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公开(公告)号:US10340297B2
公开(公告)日:2019-07-02
申请号:US15485194
申请日:2017-04-11
Applicant: Samsung Display Co., Ltd.
Inventor: Kwihyun Kim , Yoon-jang Kim , Sungryul Kim , Yunseok Lee
IPC: H01L27/12 , G09G3/36 , H01L29/786 , H01L29/417
Abstract: Deterioration of image quality in a display device due to kickback voltages may be reduced or prevented by varying parasite capacitance, the size of the semiconductor layer, and/or storage capacitance in each of thin film transistors for the pixels in the display. Various embodiments of display devices capable of reducing or preventing kickback voltages are disclosed.
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公开(公告)号:US11574599B2
公开(公告)日:2023-02-07
申请号:US17574864
申请日:2022-01-13
Applicant: Samsung Display Co., LTD.
Inventor: Sang Yong No , Kwihyun Kim , Hwa-Rang Lee , Jiyeon Choi
IPC: G09G3/3266
Abstract: A scan driver includes active stages. Each active stage includes a first transistor that resets a control node, a second transistor that transfers a previous carry signal to the control node, a third transistor that transfers a scan clock signal to a scan output node, a first capacitor electrically connected between the control node and the scan output node, a fourth transistor that transfers a first low voltage to the scan output node, a fifth transistor that transfers a carry clock signal to a carry output node, a sixth transistor that electrically connects the control node to the carry output node, and a seventh transistor that transfers a second low voltage to the control node.
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公开(公告)号:US10852612B2
公开(公告)日:2020-12-01
申请号:US16733564
申请日:2020-01-03
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sangyong No , Kwihyun Kim , Jiho Moon , Keebum Park
IPC: G02F1/1368 , G02F1/1362 , G02F1/1343 , G02F1/1335 , G02F1/1333 , G02F1/133 , G02F1/1337
Abstract: A liquid crystal display device includes a liquid crystal layer between first and second substrate. The first substrate includes a first and second sub-pixel areas. A first sub-pixel electrode is on the first substrate in the first sub-pixel area, and a first transistor is connected to a gate line, data line, and first sub-pixel electrode on the first substrate. A second sub-pixel electrode is on the first substrate in the second sub-pixel area, and a second transistor is connected to the gate line, the first transistor, and the second sub-pixel electrode. A first storage line is adjacent to one side of the first sub-pixel electrode. A second storage line is spaced from the first storage line and is adjacent to one side of the second sub-pixel electrode. A third transistor is connected to the gate line, second transistor, and second storage line.
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公开(公告)号:US10527901B2
公开(公告)日:2020-01-07
申请号:US15237673
申请日:2016-08-16
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sangyong No , Kwihyun Kim , Jiho Moon , Keebum Park
IPC: G02F1/1368 , G02F1/1362 , G02F1/1343 , G02F1/1335 , G02F1/1333 , G02F1/133 , G02F1/1337
Abstract: A liquid crystal display device includes a liquid crystal layer between first and second substrate. The first substrate includes a first and second sub-pixel areas. A first sub-pixel electrode is on the first substrate in the first sub-pixel area, and a first transistor is connected to a gate line, data line, and first sub-pixel electrode on the first substrate. A second sub-pixel electrode is on the first substrate in the second sub-pixel area, and a second transistor is connected to the gate line, the first transistor, and the second sub-pixel electrode. A first storage line is adjacent to one side of the first sub-pixel electrode. A second storage line is spaced from the first storage line and is adjacent to one side of the second sub-pixel electrode. A third transistor is connected to the gate line, second transistor, and second storage line.
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公开(公告)号:US20170193959A1
公开(公告)日:2017-07-06
申请号:US15394994
申请日:2016-12-30
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sang Yong No , Kwihyun Kim , Youngsoo Sohn
IPC: G09G3/36
CPC classification number: G09G3/3696 , G09G3/3225 , G09G3/3611 , G09G3/3614 , G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0289 , G09G2310/06 , G09G2310/08 , G09G2320/0204 , G09G2320/0209 , G09G2320/0219 , G09G2320/0257 , G09G2320/0285
Abstract: A display apparatus includes a timing controller, a data driver and a display panel. The data driver generates a positive polarity data voltage and a negative polarity data voltage based on image data compensated by the timing controller. The display panel includes a first pixel driven based on the positive polarity voltage and a second pixel driven based on the negative polarity voltage. The display panel receives a storage voltage applied to the first pixel and the second pixel. The timing controller compensates the image data when a variation on a level of the storage voltage occurs. The compensation shifts a level of the first data voltage from a first normal level to a first compensation level in a direction, and shifts a level of the second data voltage from a second normal level to a second compensation level in the same direction.
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