公开(公告)号：US20160365059A1

公开(公告)日：2016-12-15

申请号：US15066502

申请日：2016-03-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： MIN-SOO CHOI ,  YOUNG-IL BAN ,  Sunkyu Son ,  Junpyo Lee ,  Seunghwan Moon

IPC: G09G3/36

CPC classification number: G09G3/2096 ,  G09G3/2092 ,  G09G2310/0275 ,  G09G2310/08 ,  G09G2370/04 ,  G09G2370/08

Abstract: A display device includes a signal controller. A data driver is connected to the signal controller. A memory unit is connected to the signal controller. The memory unit stores data driver characteristic information corresponding to a manufacturer identification (ID) of each of a plurality of data drivers. The data driver transmits a manufacturer ID to the signal controller. The signal controller reads, from the memory unit, data driver characteristic information corresponding to the manufacturer ID received from the data driver, and the signal controller generates image data and a control signal based on the read data driver characteristic information.

Abstract translation: 显示装置包括信号控制器。 数据驱动器连接到信号控制器。 存储单元连接到信号控制器。 存储单元存储与多个数据驱动器中的每一个的制造商标识（ID）相对应的数据驱动器特性信息。 数据驱动程序向制造商ID发送信号控制器。 信号控制器从存储器单元读取与从数据驱动器接收到的制造商ID相对应的数据驱动器特性信息，并且信号控制器基于读取的数据驱动器特性信息生成图像数据和控制信号。

公开(公告)号：US20180137804A1

公开(公告)日：2018-05-17

申请号：US15806555

申请日：2017-11-08

Applicant: Samsung Display Co., Ltd.

Inventor： MIN-SOO CHOI ,  JUNPYO LEE ,  YU-CHOL KIM ,  JEONG-HYUN KIM

IPC: G09G3/20

Abstract: A display apparatus includes a gate driving control circuit, a gate driver and a display panel. The gate driving control circuit generates N gate clock signals and N inversion gate clock signals based on N gate clock control signals, phases of which partially overlap with each other. Each inversion gate clock signals has an opposite phase to a respective gate clock signal. The gate driver generates gate signals based on the N gate clock signals or the N inversion gate clock signals and applies the gate signals to gate lines. The display panel includes pixels, each connected to a respective gate line and a respective data line. Each of the pixels has a longer side in parallel with gate lines and a shorter side in parallel with the data lines. A number of the gate clock control signals is an integer multiple of a number of colors of the pixels.

公开(公告)号：US20230360592A1

公开(公告)日：2023-11-09

申请号：US18295052

申请日：2023-04-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KIHYUN PYUN ,  MIN-SOO CHOI

IPC: G09G3/32 ,  G09G3/20

CPC classification number: G09G3/32 ,  G09G3/2096 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2330/06 ,  G09G2310/0275

Abstract: A display device includes a display panel including a plurality of pixels, a data driver configured to apply a plurality of data voltages generated based on input image data to the pixels, an initialization voltage generator configured to generate an initialization voltage that initializes a light emitting element included in each of the pixels, a timing controller configured to generate a constant current control signal based on a load of the input image data, and a constant current generator configured to generate and transmit a constant current to the initialization voltage generator in response to the constant current control signal. As a result, the display device may reduce ripple of an initialization voltage by adjusting the initialization voltage according to a load of input image data, and a display device having a desirable signal-to-noise ratio (SNR) characteristic of a sensing operation may be provided.