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公开(公告)号:US20130321253A1
公开(公告)日:2013-12-05
申请号:US13736622
申请日:2013-01-08
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: SukJin PARK , DONGWON PARK , Jae-Gwan JEON , AKIHIRO TAKEGAMA , JAEHYOUNG PARK , JUNPYO LEE
IPC: G09G3/36
CPC classification number: G09G3/3611 , G09G3/3614 , G09G2320/0223 , G09G2320/0261 , G09G2360/16
Abstract: A liquid crystal display includes a display panel, a timing controller, a gate driver, and a data driver. The display panel includes a plurality of pixels. The timing controller receives an image data, compares a previous line data with a present line data to determine whether the present line data needs to be compensated, and generates a first modulation line data. In addition, the timing controller calculates the first modulation data and a delay compensation value to generate a second modulation line data. The delay compensation value is decided from reference delay compensation values of reference pixels among the pixels.
Abstract translation: 液晶显示器包括显示面板,定时控制器,门驱动器和数据驱动器。 显示面板包括多个像素。 定时控制器接收图像数据,将前一行数据与当前行数据进行比较,以确定是否需要补偿当前行数据,并生成第一调制行数据。 此外,定时控制器计算第一调制数据和延迟补偿值以产生第二调制线数据。 延迟补偿值由像素中的参考像素的参考延迟补偿值决定。
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公开(公告)号:US20180137804A1
公开(公告)日:2018-05-17
申请号:US15806555
申请日:2017-11-08
Applicant: Samsung Display Co., Ltd.
Inventor: MIN-SOO CHOI , JUNPYO LEE , YU-CHOL KIM , JEONG-HYUN KIM
IPC: G09G3/20
Abstract: A display apparatus includes a gate driving control circuit, a gate driver and a display panel. The gate driving control circuit generates N gate clock signals and N inversion gate clock signals based on N gate clock control signals, phases of which partially overlap with each other. Each inversion gate clock signals has an opposite phase to a respective gate clock signal. The gate driver generates gate signals based on the N gate clock signals or the N inversion gate clock signals and applies the gate signals to gate lines. The display panel includes pixels, each connected to a respective gate line and a respective data line. Each of the pixels has a longer side in parallel with gate lines and a shorter side in parallel with the data lines. A number of the gate clock control signals is an integer multiple of a number of colors of the pixels.
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公开(公告)号:US20150035875A1
公开(公告)日:2015-02-05
申请号:US14178669
申请日:2014-02-12
Applicant: Samsung Display Co., Ltd.
Inventor: Jae-Gwan JEON , Yong-Bum KIM , JAEHYOUNG PARK , Youngsoo SOHN , ByungKil JEON , Akihiro TAKEGAMA , JUNPYO LEE
CPC classification number: G09G5/10 , G09G3/3648 , G09G2300/0443
Abstract: A display apparatus includes a plurality of pixels connected to a plurality of gate lines and a plurality of data lines and a timing controller, in which each pixel includes a first sub-pixel and a second sub-pixel. In such a display apparatus, the timing controller provides the first sub-pixel and the second sub-pixel with a first data signal and a second data signal corresponding to one of a high gray scale curve and a low gray scale curve, alternately every frame, when the image signal is a first type of image signal, and the timing controller provides the first sub-pixel with a first data signal corresponding to the high gray scale curve and the second sub-pixel with a second data signal corresponding to the low gray scale curve when the image signal is a first type of image signal.
Abstract translation: 显示装置包括连接到多条栅极线和多条数据线的多个像素和定时控制器,其中每个像素包括第一子像素和第二子像素。 在这种显示装置中,定时控制器为第一子像素和第二子像素提供第一数据信号和对应于高灰度曲线和低灰度曲线之一的第二数据信号,每个帧 当图像信号是第一类型的图像信号时,并且定时控制器向第一子像素提供对应于高灰度曲线的第一数据信号和具有对应于低灰度曲线的第二数据信号的第二子像素 当图像信号是第一类图像信号时的灰度曲线。
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公开(公告)号:US20180261181A1
公开(公告)日:2018-09-13
申请号:US15824349
申请日:2017-11-28
Applicant: Samsung Display Co., Ltd.
Inventor: HAN-BYUL LIM , SEUNGHWAN MOON , MYUNGBO SIM , JUNPYO LEE
IPC: G09G3/36 , G09G5/02 , G09G3/3291 , G09G3/20
CPC classification number: G09G3/3696 , G09G3/2007 , G09G3/3291 , G09G3/3685 , G09G5/02 , G09G2310/08 , G09G2320/0209 , G09G2320/0242 , G09G2320/0247 , G09G2320/043 , G09G2360/16
Abstract: A display apparatus includes a timing controller, a common voltage generator, a data driver, and a display panel. The timing controller determines a representative grayscale of each frame based on input image data and generates a common voltage control signal having a first digital value ratio (“DVR”) value corresponding to a first frame, a representative grayscale of the first frame being included in a first grayscale range. The common voltage generator generates a first common voltage based on the common voltage control signal. The data driver generates a data voltage based on the input image data. The display panel displays an image corresponding to the first frame based on the data voltage and the first common voltage.
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公开(公告)号:US20140063380A1
公开(公告)日:2014-03-06
申请号:US13738531
申请日:2013-01-10
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hyun-Sik YOON , JUNPYO LEE , Jaehyun KOH , Youngrok NOH
IPC: G02B27/22
CPC classification number: G02B27/2264 , H04N13/341 , H04N13/398
Abstract: A display apparatus includes a display panel which includes a plurality of pixels, a backlight unit which includes a plurality of light sources sequentially arranged in a first direction of the display panel and provides light to the display panel, and a driving circuit which controls the display panel to allow an image to be displayed on the display panel and generates a plurality of backlight control signals to periodically turn on and off the light sources. The driving circuit generates the backlight control signals to allow the light sources to have different turn-on time periods based on positions of the light sources.
Abstract translation: 一种显示装置,包括:包括多个像素的显示面板;背光单元,包括顺序地布置在所述显示面板的第一方向上并且向所述显示面板提供光的多个光源;以及控制所述显示器的驱动电路 面板,以允许在显示面板上显示图像,并产生多个背光控制信号以周期性地打开和关闭光源。 驱动电路产生背光控制信号,以根据光源的位置使光源具有不同的导通时间段。
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公开(公告)号:US20170330523A1
公开(公告)日:2017-11-16
申请号:US15462059
申请日:2017-03-17
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: BYUNGKIL JEON , SUN-KOO KANG , SEUNGHWAN MOON , JUNPYO LEE
IPC: G09G3/36
CPC classification number: G09G3/3648 , G09G3/3688 , G09G2310/08 , G09G2320/0223
Abstract: A display apparatus includes a display panel, a gate driving part, and a data driving part. The display panel is configured to display an image, and includes a gate line and a data line. The gate driving part is configured to output a gate signal to the gate line. The data driving part is configured to output a data signal to the data line. A transition time of the data signal is a time when the data signal transitions from a low level to a high level, and the transition time of the data signal increases according to a decrease of a load of the display panel.
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