公开(公告)号：US20200219954A1

公开(公告)日：2020-07-09

申请号：US16822222

申请日：2020-03-18

Applicant: Samsung Display Co., Ltd.

Inventor： Woo Ho JEONG ,  Se Myung KWON ,  Yoon Ho KIM ,  Seok Je SEONG ,  Joon Hoo CHOI

IPC: H01L27/32 ,  H01L29/786 ,  H01L21/477 ,  H01L29/66

Abstract: An organic fight-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer. The first semiconductor layer is disposed on a layer higher than the second semiconductor layer, the first semiconductor layer comprises an oxide semiconductor, the second semiconductor layer comprises low temperature polycrystalline silicon (LTPS), and the first insulating layer covers the entire first semiconductor layer.

公开(公告)号：US20210280613A1

公开(公告)日：2021-09-09

申请号：US17026856

申请日：2020-09-21

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Se Myung KWON ,  Duk Young KIM ,  Young Kuk KIM ,  Cheol Su KIM ,  Yu Ri OH

IPC: H01L27/12 ,  H01L51/52 ,  H01L27/32

Abstract: The present disclosure relates to a display substrate. The display substrate may include a substrate, a first lower gate electrode, an insulation pattern, a first insulation layer, and a first active pattern. The first lower gate electrode may be disposed on the substrate. The insulation pattern may be disposed on and patterned to correspond to the first lower gate electrode and may include a silicon nitride. The first insulation layer may be disposed on the insulation pattern and may include a silicon oxide. The first active pattern may be on the first insulation layer and formed of oxide semiconductor and may include a first channel region overlapping the first lower gate electrode and a first wiring region disposed on a side of the first channel region.

公开(公告)号：US20160204135A1

公开(公告)日：2016-07-14

申请号：US14924012

申请日：2015-10-27

Applicant: Samsung Display Co., Ltd.

Inventor： Hyung Min KIM ,  NAM JUNE KIM ,  Jae Hyoung YOUN ,  Jang Soo KIM ,  Se Myung KWON ,  Kang-Young LEE

IPC: H01L27/12 ,  G02F1/1368 ,  G02F1/1362 ,  H01L27/32

CPC classification number: H01L27/1225 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/127 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/78696

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a gate line disposed on a substrate and including a gate electrode; a gate insulating layer formed on the gate line; a first oxide semiconductor layer disposed on the gate insulating layer and formed of an oxide semiconductor; a data wiring layer disposed on the gate insulating layer and including data line intersecting with the gate line, a source electrode connected to the data line, and a drain electrode facing the drain electrode; and a second oxide semiconductor layer covering the source electrode and the drain electrode, wherein the data wiring layer includes copper or a copper alloy.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管阵列面板包括：栅极线，设置在基板上并包括栅电极; 栅极绝缘层，形成在栅极线上; 设置在所述栅极绝缘层上并由氧化物半导体形成的第一氧化物半导体层; 配置在所述栅极绝缘层上并且包括与所述栅极线交叉的数据线的数据布线层，与所述数据线连接的源电极以及面对所述漏极的漏电极。 以及覆盖源电极和漏电极的第二氧化物半导体层，其中数据布线层包括铜或铜合金。