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公开(公告)号:US20240324284A1
公开(公告)日:2024-09-26
申请号:US18409010
申请日:2024-01-10
Applicant: Samsung Display Co., Ltd.
Inventor: Ran Kim , Sunwoo Lee
IPC: H10K59/121 , H10K59/12
CPC classification number: H10K59/1213 , H10K59/1201
Abstract: A display apparatus includes a substrate, a buffer layer located on the substrate, a first thin-film transistor located on the buffer layer, the first thin-film transistor including a first semiconductor layer and a first gate electrode insulated from the first semiconductor layer. The first semiconductor layer includes an oxide semiconductor. A first inorganic insulating layer is located between the first semiconductor layer and the first gate electrode, and emits at least 1×1019 mole/cm3 of hydrogen (H2).
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公开(公告)号:US11502111B2
公开(公告)日:2022-11-15
申请号:US17320963
申请日:2021-05-14
Applicant: Samsung Display Co., Ltd.
Inventor: Sunwoo Lee , Kihyun Kim , Younggil Park , Seulgi Lee , Geunhyuk Choi , Jaebum Han
IPC: H01L27/14 , H01L27/12 , H01L29/786
Abstract: A display apparatus includes a first silicon transistor including a first semiconductor layer including a silicon-based semiconductor and a first gate electrode; a first oxide transistor including a second semiconductor layer and a second gate electrode, the second semiconductor layer including an oxide-based semiconductor; an upper insulating layer on the first and second semiconductor layers; and a first connection electrode on the upper insulating layer, electrically connected to the first semiconductor layer through a first contact hole of the upper insulating layer, and electrically connected to the second semiconductor layer through a second contact hole of the upper insulating layer. The second semiconductor layer includes a channel region, a source region, and a drain region, and a first distance between the channel region of the second semiconductor layer and the first contact hole is about 2 μm or greater.
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公开(公告)号:US12127434B2
公开(公告)日:2024-10-22
申请号:US18116888
申请日:2023-03-03
Applicant: Samsung Display Co., Ltd.
Inventor: Seokkyu Han , Younggil Park , Jeonghun Kwak , Kihyun Kim , Sungwook Woo , Sunwoo Lee , Huiyeon Choe
IPC: H01L27/14 , H10K59/121 , H10K59/131 , H01L27/12 , H01L29/786
CPC classification number: H10K59/1213 , H10K59/131 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L29/78648 , H01L29/78675 , H01L29/7869
Abstract: The display apparatus includes a substrate, a first active layer disposed on the substrate, a first gate layer disposed on a layer covering the first active layer, the first gate layer including a first gate electrode, a second gate layer disposed on a layer covering the first gate layer, the second gate layer including an initialization line including a first part of a second electrode; a second active layer disposed on a layer covering the second gate layer, the second active layer including a second active region overlapping the first part of the second electrode; a third gate layer disposed on a layer covering the second active layer, the third gate layer including a second part of the second electrode overlapping the second active region; and a first source/drain layer disposed on a layer covering the third gate layer, the first source/drain layer including a first connection line.
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公开(公告)号:US11605687B2
公开(公告)日:2023-03-14
申请号:US17319580
申请日:2021-05-13
Applicant: Samsung Display Co., Ltd.
Inventor: Seokkyu Han , Younggil Park , Jeonghun Kwak , Kihyun Kim , Sungwook Woo , Sunwoo Lee , Huiyeon Choe
IPC: H01L27/14 , H01L27/32 , H01L27/12 , H01L29/786
Abstract: The display apparatus includes a substrate, a first active layer disposed on the substrate, a first gate layer disposed on a layer covering the first active layer, the first gate layer including a first gate electrode, a second gate layer disposed on a layer covering the first gate layer, the second gate layer including an initialization line including a first part of a second electrode; a second active layer disposed on a layer covering the second gate layer, the second active layer including a second active region overlapping the first part of the second electrode; a third gate layer disposed on a layer covering the second active layer, the third gate layer including a second part of the second electrode overlapping the second active region; and a first source/drain layer disposed on a layer covering the third gate layer, the first source/drain layer including a first connection line.
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