公开(公告)号：US20150041180A1

公开(公告)日：2015-02-12

申请号：US14104611

申请日：2013-12-12

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Young Jae LEE ,  Kyung Moo HAR ,  Young Do KWEON ,  Jin Gu KIM

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/18

CPC classification number: H05K3/383 ,  H05K3/108 ,  H05K3/244 ,  H05K3/4644 ,  H05K2203/0307 ,  Y10T29/49155

Abstract: Disclosed herein are a printed circuit board including: an insulating layer; and a metal circuit layer formed on at least one surface of the insulating layer, wherein the metal circuit layer has surface roughness on only its one surface, and a method of manufacturing the same.

Abstract translation: 这里公开了一种印刷电路板，包括：绝缘层; 以及形成在所述绝缘层的至少一个表面上的金属电路层，其中所述金属电路层仅在其一个表面上具有表面粗糙度及其制造方法。

公开(公告)号：US20150000958A1

公开(公告)日：2015-01-01

申请号：US14074338

申请日：2013-11-07

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Kyoung Moo HARR ,  Hyung Jin JEON ,  Jin Gu KIM ,  Young Jae LEE ,  Young Do KWEON ,  Chang Bae LEE

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/00

CPC classification number: H05K3/4647 ,  H05K2201/09827

Abstract: The present invention discloses a printed circuit board including a lower wiring layer, an insulating layer which buries the lower wiring layer, and an upper wiring layer formed on the insulating layer to improve reliability of interlayer electrical connection between the wiring layers, wherein the interlayer connection between the upper wiring layer and the lower wiring layer is performed by a via electrode which is provided between the upper wiring layer and the lower wiring layer and has an upper surface bonded to the upper wiring layer and a lower surface bonded to the lower wiring layer, wherein the lower surface of the via electrode is larger than the upper surface thereof.

Abstract translation: 本发明公开了一种印刷电路板，包括下布线层，埋置下布线层的绝缘层和形成在绝缘层上的上布线层，以提高布线层之间的层间电连接的可靠性，其中层间连接 上布线层和下布线层之间的通孔电极通过设置在上布线层和下布线层之间的通孔电极进行，并且具有与上布线层接合的上表面和接合到下布线层的下表面 其中，所述通孔电极的下表面大于其上表面。