公开(公告)号：US20230058497A1

公开(公告)日：2023-02-23

申请号：US17852542

申请日：2022-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOUNG LIM SUK ,  BANGWEON LEE ,  SEOKHYUN LEE

IPC: H01L23/48 ,  H01L25/10 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a package substrate, a first semiconductor chip mounted on the package substrate, a first molding layer on the package substrate and surrounding the first semiconductor chip, a redistribution layer on the first molding layer, a first through via that vertically penetrates the first molding layer and connects the package substrate to the redistribution layer, a second semiconductor chip mounted on the redistribution layer, a second molding layer on the redistribution layer and surrounding the second semiconductor chip, and a second through via that vertically penetrates the second molding layer and is connected to the redistribution layer. A first width of the first through via is less than a second width of the second through via. The second through via is electrically floated from a signal circuit of the second semiconductor chip.

公开(公告)号：US20220302052A1

公开(公告)日：2022-09-22

申请号：US17834020

申请日：2022-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： SE-HO YOU ,  SEONGHO SHIN ,  BANGWEON LEE

IPC: H01L23/66 ,  H01L23/00

Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.

公开(公告)号：US20210335734A1

公开(公告)日：2021-10-28

申请号：US17121898

申请日：2020-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： SE-HO YOU ,  SEONGHO SHIN ,  BANGWEON LEE

IPC: H01L23/66 ,  H01L23/00

Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.