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公开(公告)号:US11855013B2
公开(公告)日:2023-12-26
申请号:US17834020
申请日:2022-06-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Se-Ho You , Seongho Shin , Bangweon Lee
CPC classification number: H01L23/66 , H01L24/20 , H01L2223/6616 , H01L2223/6677 , H01L2924/1421
Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.
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公开(公告)号:US11935812B2
公开(公告)日:2024-03-19
申请号:US17209974
申请日:2021-03-23
Applicant: Samsung Electronics Co., Ltd. , UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
Inventor: Seunggeol Ryu , Seokkan Ki , Youngsuk Nam , Jaechoon Kim , Bangweon Lee , Seungtae Hwang
IPC: H01L23/373 , H01L23/473
CPC classification number: H01L23/3736 , H01L23/473
Abstract: A semiconductor package may include a package substrate, a semiconductor chip on the package substrate, a heat dissipation member on the semiconductor chip, and a first thermal interface material coated on an upper surface of the semiconductor chip to bond the semiconductor chip and the heat dissipation member. The first thermal interface material may include a liquid metal and fine particles disposed inside the liquid metal. The fine particles may have no oxide layer on a surface thereof. A volume percentage of the fine particles in the liquid metal including the fine particles therein may be about 1% to about 5%. A thermal conductivity of the liquid metal including the fine particles therein may be equal to or more than about 40 W/m·K.
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公开(公告)号:US12243803B2
公开(公告)日:2025-03-04
申请号:US18437385
申请日:2024-02-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seunggeol Ryu , Seokkan Ki , Youngsuk Nam , Jaechoon Kim , Bangweon Lee , Seungtae Hwang
IPC: H01L23/373 , H01L23/473
Abstract: A method of manufacturing a thermal interface material may include mixing fine particles with an acidic solution to remove a first oxide layer from a surface of each of the fine particles, injecting a liquid metal into the acidic solution to remove a second oxide layer from a surface of the liquid metal and for the fine particles from which the first oxide layer is removed in the acidic solution to penetrate into the liquid metal from which the second oxide layer is remove, and extracting the liquid metal including the fine particles therein from the acidic solution.
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公开(公告)号:US20240186215A1
公开(公告)日:2024-06-06
申请号:US18437385
申请日:2024-02-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seunggeol Ryu , Seokkan Ki , Youngsuk Nam , Jaechoon Kim , Bangweon Lee , Seungtae Hwang
IPC: H01L23/373 , H01L23/473
CPC classification number: H01L23/3736 , H01L23/473
Abstract: A method of manufacturing a thermal interface material may include mixing fine particles with an acidic solution to remove a first oxide layer from a surface of each of the fine particles, injecting a liquid metal into the acidic solution to remove a second oxide layer from a surface of the liquid metal and for the fine particles from which the first oxide layer is removed in the acidic solution to penetrate into the liquid metal from which the second oxide layer is remove, and extracting the liquid metal including the fine particles therein from the acidic solution.
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公开(公告)号:US11380635B2
公开(公告)日:2022-07-05
申请号:US17121898
申请日:2020-12-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Se-Ho You , Seongho Shin , Bangweon Lee
Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.
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