公开(公告)号：US09569361B2

公开(公告)日：2017-02-14

申请号：US14325343

申请日：2014-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Arun Radhakrishnan ,  Kevin Lepak ,  Rama Gopal ,  Murali Chinnakonda ,  Karthik Sundaram ,  Brian Grayson

IPC: G06F12/08

CPC classification number: G06F12/0862 ,  G06F12/10 ,  G06F2212/6022

Abstract: According to one general aspect, an apparatus may include a cache pre-fetcher, and a pre-fetch scheduler. The cache pre-fetcher may be configured to predict, based at least in part upon a virtual address, data to be retrieved from a memory system. The pre-fetch scheduler may be configured to convert the virtual address of the data to a physical address of the data, and request the data from one of a plurality of levels of the memory system. The memory system may include a plurality of levels, each level of the memory system configured to store data.

Abstract translation: 根据一个一般方面，设备可以包括高速缓存预取器和预取调度器。 高速缓存预取器可以被配置为至少部分地基于虚拟地址预测要从存储器系统检索的数据。 预取调度器可以被配置为将数据的虚拟地址转换为数据的物理地址，并且从存储器系统的多个级别之一请求数据。 存储器系统可以包括多个级别，存储器系统的每个级别被配置为存储数据。

公开(公告)号：US09286073B2

公开(公告)日：2016-03-15

申请号：US14553055

申请日：2014-11-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gerald Zuraski ,  Paul Kitchin ,  Brian Grayson

IPC: G06F12/00 ,  G06F9/38 ,  G06F12/08

CPC classification number: G06F9/38 ,  G06F9/3834 ,  G06F9/3836 ,  G06F9/3861 ,  G06F12/0831 ,  G06F12/0875

Abstract: Dynamically predicting a Read-After-Write (RAW) hazard by employing a variable confidence score attributed to a RAW Resynchronization Predictor (RRP) for sampling the RRP at timing periods dynamically adjusted based on the confidence score to optimize prediction of the RAW hazard.

Abstract translation: 通过使用归因于RAW再同步预测器（RRP）的可变置信度得分来动态地预测读后读写（RAW）危险，用于在基于置信度分数动态调整的定时周期对RRP进行采样，以优化RAW危险预测。

公开(公告)号：US20160054997A1

公开(公告)日：2016-02-25

申请号：US14832547

申请日：2015-08-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Arun Radhakrishnan ,  Karthik Sundaram ,  Brian Grayson

IPC: G06F9/30 ,  G06F9/345 ,  G06F12/08

Abstract: A computing system includes: an instruction dispatch module configured to receive an address stream; a prefetch module, coupled to the instruction dispatch module, configured to: train to concurrently detect a single-stride pattern or a multi-stride pattern from the address stream, speculatively fetch a program data based on the single-stride pattern or the multi-stride pattern, and continue to train for the single-stride pattern with a larger value for a stride count or for the multi-stride pattern.

Abstract translation: 计算系统包括：指令调度模块，被配置为接收地址流; 耦合到所述指令调度模块的预取模块，被配置为：训练从所述地址流同时检测单步模式或多步式模式，基于所述单步模式或所述多步式模式推测性地获取程序数据， 并且继续训练具有更大的步幅计数或多步式模式的单步式模式。