公开(公告)号：US20170005099A1

公开(公告)日：2017-01-05

申请号：US15160264

申请日：2016-05-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun KIM ,  ByeongJu BAE

IPC: H01L27/108 ,  H01L21/687 ,  H01L21/033 ,  H01L21/8234 ,  H01L21/3213

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

Abstract translation: 制造半导体器件的方法包括在衬底中形成器件隔离层以限定有源区，在有源区上形成导电层，形成与导电层上的有源区相交的第一掩模图案，使用第一 掩模图案作为蚀刻掩模以形成位线，从第一掩模图案的顶表面生长第二掩模图案，以及使用第二掩模图案作为蚀刻掩模来执行图案化处理，以形成暴露位线之间的有源区域的接触孔。

公开(公告)号：US20220336468A1

公开(公告)日：2022-10-20

申请号：US17858361

申请日：2022-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun KIM ,  ByeongJu BAE

IPC: H01L27/108 ,  H01L21/8234 ,  H01L21/3213 ,  H01L21/033

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

公开(公告)号：US20240172423A1

公开(公告)日：2024-05-23

申请号：US18419066

申请日：2024-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun KIM ,  ByeongJu BAE

IPC: H10B12/00 ,  H01L21/033 ,  H01L21/3213 ,  H01L21/8234

CPC classification number: H10B12/482 ,  H01L21/0332 ,  H01L21/32139 ,  H01L21/823475 ,  H01L21/823481 ,  H10B12/0335 ,  H10B12/315 ,  H10B12/485

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.