METHODS OF FABRICATING SEMICONDUCTOR DEVICE
    1.
    发明申请

    公开(公告)号:US20190279988A1

    公开(公告)日:2019-09-12

    申请号:US16426075

    申请日:2019-05-30

    Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

    Methods of fabricating semiconductor device

    公开(公告)号:US10748908B2

    公开(公告)日:2020-08-18

    申请号:US16426075

    申请日:2019-05-30

    Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

    Methods of fabricating semiconductor device

    公开(公告)号:US10566333B2

    公开(公告)日:2020-02-18

    申请号:US15160264

    申请日:2016-05-20

    Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

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