Abstract:
A method of manufacturing a semiconductor device includes forming a word line trench in an active region, forming a gate dielectric layer to cover at least a portion of the word line trench, forming a word line within the word line trench to define a capping trench, and/or forming a stressor having a compressive stress within the capping trench. The stressor is formed by using a plasma source.
Abstract:
A first bit line structure is disposed between a first contact structure and a second contact structure. A first air spacer is interposed between the first contact structure and the first bit line structure. A first separation space is connected to an air entrance of the first air spacer and interposed between the first contact structure and the first bit line structure. A cover insulating pattern with a gap portion is interposed between the first contact structure and the second contact structure. The gap portion has a downwardly-decreasing width. An air capping pattern covers the cover insulating pattern to seal the first separation space.