公开(公告)号：US20170045247A1

公开(公告)日：2017-02-16

申请号：US15306961

申请日：2015-04-13

Applicant: Samsung Electronics Co., Ltd. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Ki Hwan KWON ,  Jin Wook YOON ,  Eun Bi SEO ,  Min Hee KIM ,  Chong Am KIM ,  Byung Hyun LEE

IPC: F24F7/007 ,  F04B45/04 ,  F24F13/24

CPC classification number: F24F7/007 ,  F04B45/04 ,  F04B45/041 ,  F04B45/043 ,  F24F13/24 ,  F24F2007/005

Abstract: Provided is a multi-pulsed jets generating apparatus including: at least one actuator that generates pulsed jets in a plurality of orifices according to a volume change of a plurality of cavities caused by vibration of at least one diaphragm; and a manifold connected to the at least one actuator so as to generate multi-pulsed jets by receiving the pulsed jets occurring in the plurality of orifices. The velocity and uniformity of the pulsed jets occurring in the plurality of injection ports can be controlled according to vibration phases of a plurality of diaphragms.

Abstract translation: 提供了一种多脉冲射流发生装置，包括：至少一个致动器，其根据由至少一个隔膜的振动引起的多个空腔的体积变化而在多个孔中产生脉冲射流; 以及连接到所述至少一个致动器的歧管，以便通过接收在所述多个孔中出现的脉冲射流来产生多脉冲射流。 可以根据多个隔膜的振动相位来控制在多个喷射口中发生的脉冲射流的速度和均匀性。

公开(公告)号：US20140264936A1

公开(公告)日：2014-09-18

申请号：US14201307

申请日：2014-03-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Youl CHOI ,  Jun Hyung KIM ,  Byung Hyun LEE

IPC: H01L23/48

CPC classification number: G11C5/063 ,  G11C7/10 ,  G11C2207/105 ,  H01L25/0657 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor package including a first connection terminal group configured to receive a first signal group from the outside of the semiconductor package, a second connection terminal group configured to transmit a second signal group to the outside, a first chip connected to the first connection terminal group, and a second chip connected to the second connection terminal group and configured to receive the first and second signal groups from the first chip. Degradation of the performance of the semiconductor package, caused by the differences between signal delay times in a plurality of chips therein may be minimized.

Abstract translation: 一种半导体封装，包括被配置为从所述半导体封装的外部接收第一信号组的第一连接端子组，被配置为向外部发送第二信号组的第二连接端子组，连接到所述第一连接端子组的第一芯片 以及连接到第二连接端子组并被配置为从第一芯片接收第一和第二信号组的第二芯片。 由于其中的多个芯片中的信号延迟时间之间的差异引起的半导体封装的性能的降低可能被最小化。