Electronic device, system-on-chip, and operating method thereof

    公开(公告)号:US11797450B2

    公开(公告)日:2023-10-24

    申请号:US17232844

    申请日:2021-04-16

    CPC classification number: G06F12/0815 G06F12/0804 G06F2212/1032

    Abstract: An electronic device includes a cache memory including a memory space for storing a first cache set including a plurality of sector data and a plurality of dirty bits, each of the plurality of dirty bits representing whether corresponding sector data of the plurality of sector data are modified, a memory controller, connected to a plurality of data lines and a data mask line, for receiving the plurality of sector data and the plurality of dirty bits from the cache memory, setting a logic level of a data mask signal based on a logic level of each of the plurality of dirty bits, and outputting the plurality of sector data through the plurality of data lines and the data mask signal through the data mask line, and a memory device, connected to the plurality of data lines and the data mask line, for receiving the plurality of sector data through the plurality of data lines, and receiving the data mask signal through the data mask line.

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